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EM6607 Datasheet(PDF) 33 Page - EM Microelectronic - MARIN SA |
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EM6607 Datasheet(HTML) 33 Page - EM Microelectronic - MARIN SA |
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33 / 47 page ![]() R EM6607 Copyright © 2005, EM Microelectronic-Marin SA 33 www.emmicroelectronic.com 16 PERIPHERAL MEMORY MAP The following table shows the peripheral memory map of the EM6607. The address space is between $00 and $7F (Hex). Any addresses not shown can be considered to be reserved. Register name add hex add dec power up value write_bits read_bits Remarks b'3210 Read/Write_bits RAM 00- 5f 0-95 xxxx 0: D0 1: D1 2: D2 3: D3 direct addressing LTimLS 60 96 0000 0: TL0 1: TL1 2: TL2 3: TL3 0: TS0 1: TS1 2: TS2 3: TS3 low nibble of 8bit timer load and status register HTimLS 61 97 0000 0: TL4 1: TL5 2: TL6 3: TL7 0: TS4 1: TS5 2: TS6 3: TS7 high nibble of 8bit timer load and status register TimCtr 62 98 0000 0: TEC0 1: TEC1 2: TEC2 3: TimAuto timer control register with frequency selector Option 63 99 0000 0: NoWD 1: debPAN 2: debPCN 3: IRQedgeR Watch dog timer off Debouncer on port A disabled Debouncer on port C disabled Rising edge interrupt Option2 64 100 0000 0: BUZZERPE0 1: OEBsleepRes 2: OECsleepRes 3: OEDsleepRes Buzzer on PE0 enable PortB OE reset by Sleep PortC OE reset by Sleep PortD OE reset by Sleep PA3cnt 65 101 0000 0: PA3cntin 1: Fout 2: WDdisana 3: 0 PA3 counter input Frequency output on STRB Disable analogue WD PortE 66 102 xxxx 0: PE0 1: PE1 2: PE2 3: PE3 Port E Input/Output CIOportE 67 103 0000 0: CIOPE0 1: CIOPE1 2: CIOPE2 3: CIOPE3 Port E Input/Output individual control ClkSWB 68 104 0000 0: CkSWB0 1: CkSWB1 2: 0 3: V03 Clock selector for SWB SWBuff 69 105 1111 0: Buff0 1: Buff1 2: Buff2 3: Buff3 SWB intermediate buffer LowSWB 6A 106 0000 0: size[0] 1: size[1] 2: size[2] 3: size[3] low nibble to define the size of data to be send in Automatic mode HighSWB 6B 107 0000 0: size[4] 1: size[5] 2: StSWB 3: AutoSWB the size of the data to be sent & SWB control Register name add hex add dec power up value write_bits read_bits Remarks |
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