IMX8MPCEC datasheet(5/111 Pages) NXP

5 / 111 page

i.MX 8M Plus introduction

i.MX 8M Plus Applications Processor Datasheet for Consumer Products, Rev. 0, 03/2021

NXP Semiconductors

NOTE

The actual feature set depends on the part numbers as described in Table 3.

Security

Resource Domain Controller (RDC)

• Supports 4 domains and up to 8 regions of DDR

Arm® TrustZone® (TZ) architecture:

•Cortex®-A53 MPCore TrustZone® support

On-chip RAM (OCRAM) secure region protection using OCRAM controller

High Assurance Boot (HAB)

Cryptographic Acceleration and Assurance Module (CAAM)

• Capable to support Widevine and PlayReady content protection

• Public Key Cryptography (PKHA) with RSA and Elliptic Curve (ECC) algorithms

• Real-time integrity checker (RTIC)

• DRM support for RSA, AES, 3DES, DES

• True random number generation (RNG)

• Manufacturing protection support

Secure Non-Volatile Storage (SNVS)

• Secure real-time clock (RTC)

Secure JTAG Controller (SJC)

System debug

Arm® CoreSightTM debug and trace technology

Embedded Trace FIFO (ETF) with 4 KB internal storage to provide trace buffering

Unified trace capability for quad core Cortex®-A53 and Cortex®-M7 CPUs

Cross Triggering Interface (CTI)

Support for 5-pin (JTAG) debug interface

Table 1. Features (continued) (Sheet 4 of 4)

Subsystem

Features

IMX8MPCEC Datasheet(PDF) 5 Page - NXP Semiconductors