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STM32H7B0IB Datasheet(PDF) 150 Page - STMicroelectronics |
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STM32H7B0IB Datasheet(HTML) 150 Page - STMicroelectronics |
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150 / 205 page  Figure 55. LCD-TFT horizontal timing diagram LCD_CLK tv(HSYNC) LCD_HSYNC LCD_DE LCD_R[0:7] LCD_G[0:7] LCD_B[0:7] tCLK LCD_VSYNC tv(HSYNC) tv(DE) th(DE) Pixel 1 Pixel 2 tv(DATA) th(DATA) Pixel N HSYNC width Horizontal back porch Active width Horizontal back porch One line Figure 56. LCD-TFT vertical timing diagram LCD_CLK tv(VSYNC) LCD_R[0:7] LCD_G[0:7] LCD_B[0:7] tCLK LCD_VSYNC tv(VSYNC) M lines data VSYNC width Vertical back porch Active width One frame Vertical back porch 6.3.34 Timer characteristics The parameters given in Table 111. TIMx characteristics are guaranteed by design. Refer to Section 6.3.16 I/O port characteristics for details on the input/output alternate function characteristics (output compare, input capture, external clock, PWM output). STM32H7B0xB Operating conditions DS13196 - Rev 7 page 150/205 |
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