BLUENRG-332VC datasheet(26/67 Pages) STMICROELECTRONICS

26 / 67 page

Pin number

Pin name

(function

after reset)

Pin type

I/O

structure

Alternate functions

Additional functions

QFN32

WLCSP36

VFBSD

SMPS output

VDDA_VCA

1.2 V digital core

RSTN

I/O

RST

Reset pin

PB5

I/O

FT_a

LPUART_RX, TIM2_CH2, TIM17_BK,

ANTENNA_ID[5]

Wakeup, ADC_VINP3

PB4

I/O

FT_a

LPUART_TX, TIM2_CH1, TIM17_CH1N,

ANTENNA_ID[4]

Wakeup, ADC_VINM3

VDD1

1.7-3.6 battery voltage

input

VSSA

Ground analog ADC core

VSSIO

Ground I/O

VSSIFADC

Ground analog RF

VSSSX

Ground analog RF

VSSRFTRX

Ground analog RF

Exposed

pad

GND

Ground

Table 5. Legend/abbreviations used in the pinout table

Name

Abbreviation

Definition

Pin name

Unless otherwise specified in brackets below, the pin name and the pin function during

and after reset are the same as the actual pin name

Pin type

Supply pin

Input only pin

I/O

Input / output pin

I/O structure

5 V tolerant I/O

3.6 V tolerant I/O

RF I/O

RST

Bidirectional reset pin with weak pull-up resistor

Options for TT or FT I/Os

_f(1).

I/O, Fm+ capable

_a(2).

I/O, with analog switch function supplied by IO

BOOSTER(3)

Notes

Unless otherwise specified by a note, all I/Os are set as analog inputs during and after

reset

Pin functions

Alternate functions Functions selected through GPIOx_AFR registers

Additional functions Functions directly selected/enabled through peripheral registers

1. The related I/O structures in Table 4. Pin descriptions are: FT_f

2. The related I/O structures in Table 4. Pin descriptions are: FT_a

3. IO BOOSTER block allows the good behavior of those switches to be guaranteed when the VBAT goes below 2.7 V.

BlueNRG-LPS

Pinouts and pin description

DS13819 - Rev 4

page 26/67

BLUENRG-332VC Datasheet(PDF) 26 Page - STMicroelectronics

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