ISL8200AMM

FN8287 Rev 2.00

Page 4 of 24

June 3, 2015

6

ISHARE

Analog Current Output - Cascaded system level overcurrent shutdown pin. This pin is used where you have multiple modules

configured for current sharing and is used with a common current share bus. The bus sums each of the modules' average

current contribution to the load to protect for an overcurrent condition at the load. The pin sources 15µA plus average

module's output current. The shared bus voltage (VISHARE) is developed across an external resistor (RISHARE). VISHARE

represents the average current of all active channel(s) that are connected together.

The ISHARE bus voltage is compared with each module's internal reference voltage set by each module's RISET resistor. This

will generate an individual current share error signal in each cascaded controller. The share bus impedance RISHARE should

be set as RISET/NCTRL, RISET divided by the number of active current sharing controllers. The output current from this pin

generates a voltage across the external resistor. This voltage, VISHARE, is compared to an internal 1.2V threshold for average

overcurrent protection. For full-scale current, RISHARE should be ~10k. Typically 10k is used for RSHARE and RSET. The

output current range is 15µA to 126µA typ.

7

FSYNC_IN

Analog Input Control Pin - An optional external resistor (RFS-ext) connected to this pin and ground will increase the oscillator

switching frequency. It has an internal 59k

 resistor for a default frequency of 700kHz. The internal oscillator will lock to an

external frequency source when connected to a square waveform. The external source is typically the CLKOUT signal from

another ISL8200AMMREP or an external clock. The internal oscillator synchronizes with the leading positive edge of the input

signal. The input voltage range for the external source is 0V to 5V Square Wave. When not synchronized to an external clock,

a 100pF capacitor between FSYNC_IN and PGND1 is recommended.

8

CLKOUT

Digital Voltage Output - This pin provides a clock signal to synchronize with other ISL8200AMMREP(s). When there is more

than one ISL8200AMMREP in the system, the two independent regulators can be programmed via PH_CNTRL for different

degrees of phase delay.

9

PH_CNTRL

Analog Input - The voltage level on this pin is used to program the phase shift of the CLKOUT clock signal to synchronize with

other module(s).

10

ISHARE_BUS

Open pin until first PWM pulse is generated. Then, via an internal FET, this pin connects the module’s ISHARE to the system’s

ISHARE bus after pre-bias is complete and soft-start is initiated.

11

FF

Analog Voltage Input - The voltage on this pin is fed into the controller, adjusting the sawtooth amplitude to generate the

feed-forward function. The input voltage range is 0.8V to VCC. Typically, FF is connected to EN.

12

EN

This is a double function pin: Analog Input Voltage - The input voltage to this pin is compared with a precision 0.8V reference

and enables the digital soft-start. The input voltage range is 0V to VCC or VIN through a pull-up resistor maintaining a typical

current of 5mA.

Analog Voltage Output - This pin can be used as a voltage monitor for input bus undervoltage lockout. The hysteresis levels

of the lockout can be programmed via this pin using a resistor divider network. Furthermore, during fault conditions (such as

overvoltage, overcurrent, and over-temperature), this pin is used to communicate the information to other cascaded modules

by pulling the wired OR low as it is an Open Drain. The output voltage range is 0V to VCC.

13

VIN

Analog Voltage Input - This pin should be tied directly to the input rail when using the internal linear regulator. It provides

power to the internal linear drive circuitry. When used with an external 4.5V supply, this pin should be tied directly to PVCC.

The internal linear device is protected against the reversed bias generated by the remaining charge of the decoupling

capacitor at VCC when losing the input rail. The input voltage range is 4.5V to 20V.

14

PVCC

Analog Output - This pin is the output of the internal series linear regulator. It provides the bias for both low-side and high-side

drives. Its operational voltage range is 4.5V to 5.6V. The decoupling ceramic capacitor on the PVCC pin is 10µF.

16

PHASE

Analog Output - This pin is the phase node of the regulator.

17

PVIN

Analog Input - This input voltage is applied to the power FETs with the FET’s ground being the PGND pin. It is recommended

to place input decoupling capacitance, 22µF, directly between the PVIN pin and the PGND pin as close as possible to the

module. The input voltage range is 3V to 20V.

18

PGND

All voltage levels are referenced to this pad. This is the low side MOSFET ground. PGND and PGND1 should be connected

together with a ground plane.

19

VOUT

Output voltage from the module. The output voltage range is 0.6V to 6V.

20

OCSET

Analog Input - This pin is used with the PHASE pin to set the current limit of the module. The input voltage range is 0V to 27V.

21

VCC

Analog Input - This pin provides bias power for the analog circuitry. It’s operational range is 4.5V to 5.6V. In 3.3V applications,

VCC, PVCC and VIN should be shorted to allow operation at the low end input as it relates to the VCC falling threshold limit.

This pin can be powered either by the internal linear regulator or by an external voltage source.

22

PGOOD

Analog Output - This pin, pulled up to VCC via an internal 10kΩ resistor, provides a Power-Good signal when the output is

within 9% of nominal output regulation point with 4% hysteresis (13%/9%), and soft-start is complete. An external pull-up is

not required. PGOOD monitors the outputs (VMON1) of the internal differential amplifiers. The output voltage range is 0V to

VCC.

Pin Descriptions (Continued)

PIN #

PIN NAME

PIN DESCRIPTION