ISL8200AMMREP datasheet(13/24 Pages) RENESAS

13 / 24 page

ISL8200AMM

FN8287 Rev 2.00

Page 13 of 24

June 3, 2015

Applications Information

Programming the Output Voltage (RSET)

The ISL8200AMMREP has an internal 0.6V ± 0.7% reference

voltage. Programming the output voltage requires a dividing

resistor (RSET) between the VOUT_SET pin and the VOUT

regulation point. The output voltage can be calculated as shown

in Equation 1:

Note: ISL8200AMMREP has integrated 2.2kΩ resistances into

the module dividing resistor for the bottom side (ROS). The

resistances for different output voltages in single phase

operation are listed in Table 1. For a parallel setup, please refer

to the current sharing application note (Coming Soon).

The output voltage accuracy can be improved by maintaining the

impedance at VOUTSET (internal VSEN1+) at or below 1kΩ

effective impedance. Note: the impedance between VSEN1+ and

VSEN1- is about 500k.

The module has a minimum input voltage at a given output

voltage, which needs to be a minimum of 1.43 times the output

voltage if operating at fSW = 700kHz switching frequency. This is

due to the Minimum PWM OFF Time (tMIN-OFF).

The equation to determine the minimum PVIN to support the

required VOUT is given by Equations 2 and 3; it is recommended

to add 0.5V to the result to account for temperature variations.

tSW = switching period = 1/fSW

for the 700kHz switching frequency = 1428ns

For 3V input voltage operation, the VIN voltage should be at least

4.5V for sufficient gate drive voltage. This can be accomplished

by using a voltage greater than or equal to 4.5V on VIN. VIN is the

input to the internal LDO that powers the control circuitry. PVIN is

the power input to the power stage. Figure 21 shows a scenario

where the power stage is running down to 3.0V and the control

circuitry is running down to 4.5V. Figure 22 is a more general

setup and can accommodate a VIN range from 4.5V up to 20V.

Selection of the Input Capacitor

The input filter capacitor should be based on how much ripple

the supply can tolerate on the DC input line. The larger the

capacitor, the less ripple expected, but consideration should be

taken for the higher surge current during power-up. The

ISL8200AMMREP provides the soft-start function that controls

and limits the current surge. The value of the input capacitor can

be calculated by Equation 4:

Where:

CIN(MIN) is the minimum input capacitance (µF) required

IO is the output current (A)

D is the duty cycle (VO/VIN)

VP-P(MAX) is the maximum peak-to-peak voltage (V)

FS is the switching frequency (Hz)

In addition to the bulk capacitance, some low Equivalent Series

Inductance (ESL) ceramic capacitance is recommended to

decouple between the PVIN pin and PGND pin. This is used to

reduce the voltage ringing created by the switching current

across parasitic circuit elements.

TABLE 1. VOUT - RSET

VOUT

0.6V

0.8V

1.0V

1.2V

RSET

0Ω

732Ω

1.47kΩ

2.2kΩ

VOUT

1.5V

1.8V

2.0V

2.5V

RSET

3.32kΩ

4.42kΩ

5.11kΩ

6.98kΩ

VOUT

3.3V

5.0V

6.0V

RSET

10kΩ

16.2kΩ

20kΩ

VOUT

0.6

RSET

ROS

-------------









(EQ. 1)

PVIN_MIN

VOUT tSW



tSW tMIN_OFF

–

---------------------------------------

(EQ. 2)

PVIN_MIN

1.43 VOUT



(EQ. 3)

FIGURE 21. 3V OPERATION

PVIN

VIN

VOUT

VOUT_SET

VSEN_REM-

PGND1

ISL8200AMMREP

POWER MODULE

ISHARE

PVIN = 3V TO 20V

VIN = 4.5V TO 20V



10µF

FIGURE 22. 4.5V TO 20V OPERATION

PVIN

VIN

VOUT

VOUT_SET

VSEN_REM-

PGND1

ISL8200AMMREP

POWER MODULE

ISHARE

VIN = 4.5V TO 20V



10µF

CIN MIN



D1 D

–





VP-P MAX

 FS



---------------------------------------



(EQ. 4)

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