CS5332

http://onsemi.com

18

GATE(H)2

COMP

Figure 18. Additional Application Diagram, 5.0 V only to 2.5 V

ENABLE

25.5 k

GL2

1 nF

CS1

CS2

PWRGD

REF

GND2

GATE(L)2

SS

GATE(L)1

LGND

GATE(H)1

GND1

GL1

300 nH

1.0 μF

1.0 μF

1.0 μF

1.2 μH

1.2 μH

0.1 μF

0.1 μF

2.8 k

1.0 k

25.5 k

0.1 μF

0.1 μF

PWRGD

3 × 4SP560M

12.7 k

2.74 k

25.4 k

56.2 k

1 nF

10 k

1 nF

1.0 μF

0.1 μF

+

3 × 10 μF

GATE(H)2

ENABLE

COMP

CS1

CS2

PWRGD

REF

SS

GND2

GATE(L)2

LGND

GATE(H)1

GND1

GATE(L)1

PWRGD

+12 V

+5 V

Figure 19. Additional Application Diagram, 5.0 V to 1.6 V with 12 V Bias

2.74 k

1.0 nF

.01 μF

.01 μF

.01 μF

0.1 μF

1.0 nF

1.0 nF

56.2 k

25.4 k

12.7 k

25.5 k

25.5 k

1.0 k

4.87 k

1.0 μF

470 nH

12 × 1.0 μF

8 × 4SP560M

+

+

300 nH

1.0 μF

0.1 μF

3 × 16SP270M

470 nH