Nexperia

74LVC1G17

Single Schmitt trigger buffer

VEXT

VCC

VI

VO

mna616

DUT

CL

RT

RL

RL

G

Test data is given in Table 11.

Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Fig. 12. Test circuit for measuring switching times

Table 11. Test data

Supply voltage

Input

Load

VEXT

VCC

VI

tr = tf

CL

RL

tPLH, tPHL

1.65 V to 1.95 V

VCC

≤ 2.0 ns

30 pF

1 kΩ

open

2.3 V to 2.7 V

VCC

≤ 2.0 ns

30 pF

500 Ω

open

2.7 V

2.7 V

≤ 2.5 ns

50 pF

500 Ω

open

3.0 V to 3.6 V

2.7 V

≤ 2.5 ns

50 pF

500 Ω

open

4.5 V to 5.5 V

VCC

≤ 2.5 ns

50 pF

500 Ω

open

12. Application information

2

3

4

6

50

0

40

5

30

20

10

mnb156

ICC

(mA)

VCC (V)

(1)

(2)

Linear change of VI between 0.8 V to 2.0 V.

(1) Positive-going edge

(2) Negative-going edge

Fig. 13. Average supply current as a function of supply voltage

74LVC1G17

All information provided in this document is subject to legal disclaimers.

© Nexperia B.V. 2022. All rights reserved

Product data sheet

Rev. 14 — 14 January 2022

9 / 19