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SI5350A-B Datasheet(PDF) 6 Page - Skyworks Solutions Inc. |
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SI5350A-B Datasheet(HTML) 6 Page - Skyworks Solutions Inc. |
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6 / 39 page ![]() Si5350A-B 6 Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com Rev. 1.2 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • August 27, 2021 Table 5. AC Characteristics (VDD = 1.8 V ±5%, 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit Powerup Time TRDY From VDD =VDDmin to valid output clock, CL =5pF, fCLKn >1MHz —2 10 ms Powerup Time, PLL Bypass Mode TBYP From VDD =VDDmin to valid output clock, CL =5pF, fCLKn >1MHz —0.5 1 ms Output Enable Time TOE From OEB assertion to valid clock output, CL =5pF, fCLKn >1MHz —— 10 µs Output Frequency Transition Time TFREQ fCLKn >1MHz — — 10 µs Spread Spectrum Frequency Deviation SSDEV Down spread. Selectable in 0.1% steps. –0.1 — –2.5 % Center spread. Selectable in 0.1% steps. ±0.1 — ±1.5 % Spread Spectrum Modulation Rate SSMOD 30 31.5 33 kHz Table 6. Input Characteristics (VDD = 1.8 V ±5%, 2.5 V ±10%, or 3.3 V ±10%, TA =–40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit Crystal Frequency fXTAL 25 — 27 MHz P0-P4 Input Low Voltage VIL_P0-4 –0.1 — 0.3 x VDD V P0-P4 Input High Voltage VIH_P0-4 VDD = 2.5 V or 3.3 V 0.7 x VDD —3.60 V VDD = 1.8 V 0.8 x VDD —3.60 V Table 7. Output Characteristics (VDD = 1.8 V ±5%, 2.5 V ±10%, or 3.3 V ±10%, TA = –40 to 85 °C) Parameter Symbol Test Condition Min Typ Max Unit Frequency Range1 FCLK 0.0025 — 200 MHz Load Capacitance CL FCLK < 100 MHz — — 15 pF Duty Cycle DC FCLK < 160 MHz, Measured at VDD/2 45 50 55 % FCLK > 160 MHz, Measured at VDD/2 40 50 60 % Notes: 1. Only two unique frequencies above 112.5 MHz can be simultaneously output. 2. Measured over 10k cycles. Jitter is only specified at the default high drive strength (50 output impedance). 3. Jitter is highly dependent on device frequency configuration. Specifications represent a “worst case, real world” frequency plan; actual performance may be substantially better. Three-output 10MSOP package measured with clock outputs of 74.25, 24.576, and 48 MHz. Eight-output 20QFN package measured with clock outputs of 33.33, 74.25, 27, 24.576, 22.5792, 28.322, 125, and 48 MHz. Four-output, 16-QFN package measured with clock outputs of 33.333, 27, 28.322, and 48 MHz. |
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