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ES9842PRO Datasheet(PDF) 97 Page - ESS Technology,Inc |
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ES9842PRO Datasheet(HTML) 97 Page - ESS Technology,Inc |
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97 / 167 page  VERSION 0.5 ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM ES9842 PRO Product Datasheet 97 Register 64: ADC CH1 CONFIG 2 Bits [7:5] [4:3] [2] [1] [0] Default 3'b000 2'b00 1'b0 1'b0 1'b0 Bits Mnemonic Description [7:5] ADC_COMP_SEL_CH1 Sets the gain of the comparator for Channel 1. • Program to 3'b001 for optimum performance [4:3] ADC_SUM_SEL_CH1 Sets the bandwidth of the summing amplifier for Channel 1. • Program to 2'b11 for optimum performance [2] ADC_USE_DITHER_EXT_CH1 Enable the external dither for Channel 1. • 1'b0: Disabled (default) • 1'b1: Enabled [1] ADC_USE_DITHER_CH1 Enable the dither for Channel 1. • 1'b0: Disabled (default) • 1'b1: Enabled [0] ADC_USE_STATE_CH1 Use state as logic output for Channel 1. • Default value is 0. |
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