CC1110-RTY1 datasheet(194/203 Pages) TI

194 / 203 page

CC1110

CC1110 PRELIMINARY Datasheet (Rev. 1.01) SWRS033A

Page 194 of 202

GDO0_CFG[5:0]

GDO1_CFG[5:0]

GDO2_CFG[5:0]

Description

0-7

Not in use

Preamble Quality Reached. Asserts when the PQI is above the programmed PQT value.

Clear channel assessment. High when RSSI level is below threshold (dependent on the current

CCA_MODE setting)

Lock detector output

Serial Clock. Synchronous to the data in synchronous serial mode.

Data is set up on the falling edge and is read on the rising edge of SERIAL_CLK.

Serial Synchronous Data Output. Used for synchronous serial mode. The MCU must read DO on the

rising edge of SERIAL_CLK. Data is set up on the falling edge by CC1100.

Serial transparent Data Output. Used for asynchronous serial mode.

Carrier sense. High if RSSI level is above threshold.

CRC OK. The last CRC comparison matched. Cleared when entering/restarting RX mode.

ADC I/Q – serialized

Decimation filter output I/Q + channel filter I/Q + CORDIC + GAIN

Demodulator backend key signals (PSK)

Demodulator backend key signals (FSK)

Data filter output

Not in use

RX_HARD_DATA[1]

RX_HARD_DATA[0]

FPLL

CLK_PRE

VCO_CURR_COMP

PA_PD

LNA_PD

RX_SYMBOL_TICK

30-46

Not in use

Hard-wired to 0 (hard-wired to 1 achieved with inverted polarity selected on output test signal)

48-63

Not in use

Table 52: Debug output signals

CC1110-RTY1 Datasheet(PDF) 194 Page - Texas Instruments