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CC1110-RTR1 Datasheet(PDF) 182 Page - Texas Instruments

Part # CC1110-RTR1
Description  True System-on-Chip with Low Power RF Transceiver and 8051 MCU
PDF  203 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CC1110-RTR1 Datasheet(HTML) 182 Page - Texas Instruments

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CC1110
CC1110 PRELIMINARY Datasheet (Rev. 1.01) SWRS033A
Page 182 of 202
0xDF11: DEVIATN – Modem deviation setting
Bit
Field Name
Reset
R/W
Description
7
-
0
R0
Reserved
6:4
DEVIATION_E[2:0]
100
R/W
Deviation exponent
3
-
0
R0
Reserved
2:0
DEVIATION_M[2:0]
111
R/W
When MSK modulation is enabled:
Sets fraction of symbol period used for phase change.
When 2-FSK/GFSK modulation is enabled:
Deviation mantissa, interpreted as a 4-bit value with MSB
implicit 1. The resulting FSK deviation is given by:
E
DEVIATION
xosc
dev
M
DEVIATION
f
f
_
17
2
)
_
8
(
2
⋅
+
⋅
=
The default values give ±47.607 kHz deviation, assuming
26.0 MHz crystal frequency.
0xDF12: MCSM2 – Main Radio Control State Machine configuration
Bit
Field Name
Reset
R/W
Description
7:5
-
000
R0
Reserved
4
RX_TIME_RSSI
0
R/W
Direct RX termination based on RSSI measurement (carrier
sense). For ASK/OOK modulation, RX times out if there is
no carrier sense in the first 8 symbol periods.
3
RX_TIME_QUAL
0
R/W
When the RX_TIME timer expires, the chip checks if sync
word is found when RX_TIME_QUAL=0, or either sync
word is found or PQT is set when RX_TIME_QUAL=1.
2:0
RX_TIME[2:0]
111
R/W
Timeout for sync word search in RX. The timeout is relative
to the programmed EVENT0 timeout. The RX timeout is
scaled by 1 bit less than the EVENT0 timeout with respect
to the WORCTRL.WOR_RES setting, as very long timeouts
probably also will use very low RX duty cycles.
Setting
RX timeout
Duty cycle, WOR
0 (000)
TEVENT0 / 2
(3+WOR_RES)
12.5% / 2
WOR_RES
1 (001)
TEVENT0 / 2
(4+WOR_RES)
6.25% / 2
WOR_RES
2 (010)
TEVENT0 / 2
(5+WOR_RES)
3.125% / 2
WOR_RES
3 (011)
TEVENT0 / 2
(6+WOR_RES)
1.563% / 2
WOR_RES
4 (100)
TEVENT0 / 2
(7+WOR_RES)
0.781% / 2
WOR_RES
5 (101)
TEVENT0 / 2
(8+WOR_RES)
0.391% / 2
WOR_RES
6 (110)
TEVENT0 / 2
(9+WOR_RES)
0.195% / 2
WOR_RES
7 (111)
Until end of packet
N/A (no timeout)
Note that the RC oscillator must be enabled in order to use
setting 0-6, because the timeout counts RC oscillator
periods.
The timeout counter resolution is limited: With RX_TIME=0,
the timeout count is given by the 13MSBs of EVENT0,
decreasing to the 7MSBs of EVENT0 with RX_TIME=6.



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