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MFS5600AMBAFES Datasheet(PDF) 64 Page - NXP Semiconductors |
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MFS5600AMBAFES Datasheet(HTML) 64 Page - NXP Semiconductors |
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64 / 118 page  NXP Semiconductors FS5600 Automotive buck regulator and controller with voltage monitors and watchdog timer Transition Description Transition conditions C NORMAL STATE to INIT_ RUN Condition 7: (FCCUxx_ERR = 1) C NORMAL STATE to INIT_ RUN Condition 8: (GOTO_INIT_RUN = 1 set by system software) D1 NORMAL STATE to On- Demand ABIST OD_ABIST = 1 E1 On-Demand ABIST to NORMAL STATE OD_ABIST = 0 (upon self-clearing after completion of On Demand ABIST) D2 INIT_RUN to On-Demand ABIST OD_ABIST = 1 E2 On-Demand ABIST to INIT_ RUN OD_ABIST = 0 (upon self-clearing after completion of On Demand ABIST) F INIT_RUN to deep fail-safe OTP_DFS_EN = 1 && FLT_ERR_CNT[3:0] reaches limit G NORMAL STATE/INIT_ RUN/On-Demand ABIST/ deep fail-safe to Thermal Shutdown Tj > Tjmax_rise H Thermal Shut-down to Power Up Tj < Tjmax_fall I1 Any State after BIST to Power Down EN1 and EN2 = 0 I2 Power Down to Shutdown Mode Completion of Power Down J Any state after Internal Core Power Up up to Wait for valid VDIG, VCC Condition 1: VCC_UV_F (VCC under-voltage) J Any state after Internal Core Power Up up to Wait for valid VDIG, VCC Condition 2: VCC_OV_R (VCC over-voltage) J Any state after Internal Core Power Up up to Wait for valid VDIG, VCC Condition 3: VCC_POR J Any state after Internal Core Power Up up to Wait for valid VDIG, VCC Condition 4: VDIG_POR (includes UV on VDIG) J Any state after Internal Core Power Up up to Wait for valid VDIG, VCC Condition 5: VDIG_OV K NORMAL STATE to deep fail-safe OTP_DFS_EN = 1 && WD_ERR_CNT[1:0] >= WD_ERR_LIMIT[1:0] && WD_FAIL_IMPACT[1:0] = 0b10 L INIT_RUN to ULPM Mode (OTP_MODE_SYNCINB = 1 && OTP_ULPM_EN = 1 && MODE_SYNCIN pin = High) Table 53. State transition table...continued FS5600 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 29 April 2024 64 / 118 |
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