R5

100 kŸ

C1

100 pF

+

±

R1

100 kŸ

VCC

R2

100 kŸ

OUT

VA

VC

R4

1 MŸ

D1

D2

t1

t2

0

V

+

R3

100 kŸ

Figure 6-12. Adjustable Pulse Width Generator

The charge path is set through R5 and D2 when the output is high. Similarly, the discharge path for the capacitor

is set by R4 and D1 when the output is low.

The pulse width t1 is determined by the RC time constant of R5 and C. Thus, the time t2 between the pulses

can be changed by varying R4, and the pulse width can be altered by R5. The frequency of the output can be

changed by varying both R4 and R5. At low voltages, the effects of the diode forward drop (0.8 V, or 0.15V for

Shottky) must be taken into account by altering output high and low voltages in the calculations.

6.2.4 Time Delay Generator

The circuit shown in Figure 6-13 provides output signals at a prescribed time interval from a time reference and

automatically resets the output low when the input returns to 0V. This is useful for sequencing a "power on"

signal to trigger a controlled start-up of power supplies.

+

±

100 NŸ

10 NŸ

+V

51 NŸ

10 0Ÿ

+

±

10 NŸ

10 0Ÿ

+

±

10 NŸ

10 0Ÿ

51 NŸ

51 NŸ

V1

V3

V2

+

±

R

100 NŸ

100 NŸ

VC

C

Input

Gating

Signal

VIN

t0

0

V

+

t4

Open

Drain

Output

t0

t1

t2

t3

t4

V1

V2

V3

VC

+VLOGIC2

RPU

+VLOGIC3

RPU

+VLOGIC1

RPU

RPU not required if using

push-pull output devices

t0 t1

t0

t2

t0

t3

1

2

3

4

Figure 6-13. Time Delay Generator

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TLV1812-EP, TLV1822-EP

SNOSDJ3 – MAY 2024

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