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LTC2414IGN Datasheet(PDF) 31 Page - Linear Technology |
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LTC2414IGN Datasheet(HTML) 31 Page - Linear Technology |
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31 / 48 page ![]() LTC2414/LTC2418 31 241418fa mode rejection and by carefully eliminating common mode to differential mode conversion sources in the input circuit. The user should avoid single-ended input filters and should maintain a very high degree of matching and symmetry in the circuits driving the IN+ and IN– pins. Second, the increase in clock frequency will increase proportionally the amount of sampling charge transferred through the input and the reference pins. If large external input and/or reference capacitors (CIN, CREF) are used, the previous section provides formulae for evaluating the effect of the source resistance upon the converter perfor- mance for any value of fEOSC. If small external input and/ or reference capacitors (CIN, CREF) are used, the effect of the external source resistance upon the LTC2414/LTC2418 typical performance can be inferred from Figures 12, 13, 18 and 19 in which the horizontal axis is scaled by 153600/ fEOSC. Third, an increase in the frequency of the external oscilla- tor above 460800Hz (a more than 3 × increase in the output data rate) will start to decrease the effectiveness of the internal autocalibration circuits. This will result in a progressive degradation in the converter accuracy and linearity. Typical measured performance curves for output data rates up to 100 readings per second are shown in Figures 23, 24, 25, 26, 27, 28, 29 and 30. In order to obtain the highest possible level of accuracy from this converter at output data rates above 20 readings per second, the user is advised to maximize the power supply voltage used and to limit the maximum ambient operating temperature. In certain circumstances, a reduction of the differential reference voltage may be beneficial. Input Bandwidth The combined effect of the internal Sinc4 digital filter and of the analog and digital autocalibration circuits deter- mines the LTC2414/LTC2418 input bandwidth. When the internal oscillator is used with the notch set at 60Hz (FO = LOW), the 3dB input bandwidth is 3.63Hz. When the internal oscillator is used with the notch set at 50Hz (FO = HIGH), the 3dB input bandwidth is 3.02Hz. If an external conversion clock generator of frequency fEOSC is connected to the FO pin, the 3dB input bandwidth is 0.236 • 10–6 • fEOSC. APPLICATIO S I FOR ATIO OUTPUT DATA RATE (READINGS/SEC) 200 160 120 80 40 0 –40 –80 –120 –160 –200 2414/18 F23 0 102030 40 50 60 70 80 90 100 TA = 25°C TA = 85°C VCC = 5V VREF = 5V VIN = 2.5V VINCM = 2.5V SDI = GND FO = EXTERNAL OSCILLATOR OUTPUT DATA RATE (READINGS/SEC) 0 2000 0 –2000 –4000 –6000 –8000 –10000 –12000 2414/18 F24 20 100 90 80 70 60 50 10 30 40 TA = 25°C TA = 85°C VCC = 5V VREF = 5V VIN = 2.5V VINCM = 2.5V SDI = GND FO = EXTERNAL OSCILLATOR OUTPUT DATA RATE (READINGS/SEC) 0 12000 10000 8000 6000 4000 2000 0 –2000 2414/18 F25 20 100 90 80 70 60 50 10 30 40 TA = 25°C TA = 85°C VCC = 5V VREF = 5V VIN = 2.5V VINCM = 2.5V SDI = GND FO = EXTERNAL OSCILLATOR Figure 23. Offset Error vs Output Data Rate and Temperature Figure 24. +FS Error vs Output Data Rate and Temperature Figure 25. –FS Error vs Output Data Rate and Temperature |
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