MB88153A datasheet(5/21 Pages) FUJITSU

5 / 21 page

MB88153A

■ HANDLING DEVICES

Preventing Latch-up

A latch-up can occur if, on this device, (a) a voltage higher than VDD or a voltage lower than VSS is applied to an

input or output pin or (b) a voltage higher than the rating is applied between VDD pin and VSS pin. The latch-up,

if it occurs, significantly increases the power supply current and may cause thermal destruction of an element.

When you use this device, be very careful not to exceed the maximum rating.

Handling unused pins

Do not leave an unused input pin open, since it may cause a malfunction. Handle by, using a pull-up or

pull-down resistor.

Unused output pin should be opened.

Power supply pins

Please design connecting the power supply pin of this device by as low impedance as possible from the current

supply source.

We recommend connecting electrolytic capacitor (about 10

µF) and the ceramic capacitor (about 0.01 µF) in

parallel between VSS pin and VDD pin near the device, as a bypass capacitor.

Clock I/O circuit

Noise near the CKIN pin may cause the device to malfunction. Design the printed circuit board so that the wiring

for the clock input does not intersect any other wiring.

Please pay attention so that an overshoot and an undershoot do not occur to an input clock of CKIN pin.

Design the printed circuit board that surrounds the CKIN and CKOUT pins with ground.

MB88153A Datasheet(PDF) 5 Page - fujitsu semiconductor