GL9701 datasheet(4/75 Pages) GENESYS

4 / 75 page

GL9701 PCI Express

TM to PCI Bridge

Page 4

TABLE OF CONTENTS

CHAPTER 1 GENERAL DESCRIPTION....................................................9

CHAPTER 2 FEATURES ............................................................................ 10

2.1 PCI EXPRESS FEATURES........................................................................ 10

2.2 PCI INTERFACE FEATURES ................................................................... 10

2.3 POWER MANAGEMENT .......................................................................... 10

2.4 SMBUS INTERFACE ............................................................................... 11

CHAPTER 3 PIN ASSIGNMENT ............................................................... 12

3.1 PIN CONFIGURATION ............................................................................. 12

3.2 PINOUT.................................................................................................. 13

3.3NUMERIC PIN ASSIGNMENT LIST ........................................................... 14

3.4 SIGNAL DESCRIPTION ............................................................................ 16

3.4.1 PCI-Express Interface .................................................................. 16

3.4.2 Secondary PCI Interface .............................................................. 17

3.4.3 EEPROM Signals ......................................................................... 18

3.4.4 Miscellaneous Signals ................................................................... 18

3.4.5 Power and Ground Signals .......................................................... 19

CHAPTER 4 BLOCK DIAGRAM............................................................... 21

CHAPTER 5 FUNCTION DESCRIPTION ................................................ 24

5.1 POWER MANAGEMENT .......................................................................... 24

5.1.1 PCI-PM Software Compatible Power Management .................. 24

5.1.2 Hardware-Controlled Active State Power Management............ 24

5.1.3 In-band Beacon............................................................................. 24

5.1.4 Side-band WAKE_N .................................................................... 25

5.1.5 Power Management System Messages ........................................ 25

5.2 PCI CLOCK RUN.................................................................................... 25

5.3 PCI CLOCK............................................................................................ 25

5.4 INTERRUPT MAPPING ............................................................................. 26

5.5 INITIAL FLOW CONTROL ADVERTISEMENTS ......................................... 27

5.6 IDSEL MAPPING ................................................................................... 28

CHAPTER 6 REGISTER DESCRIPTION ................................................. 29

6.1 OFFSET 00H: DEVICE IDENTIFICATION.................................................. 34

6.2 OFFSET 04H: COMMAND REGISTER ...................................................... 34

6.3 OFFSET 06H: STATUS REGISTER............................................................ 35

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