6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range, unless otherwise noted. (1)

MIN

MAX

UNIT

VBATT

Voltage range(2)

–0.3

7

V

Voltage range(3)

CLK_REQ_1/2, MCLK_IN

–0.3

VBATT + 0.3

V

VLDO, CLK_OUT_1/2(2)

–0.3

VBATT + 0.3

IIK

Input clamp current at VBATT,

CLK_REQ_1/2, and MCLK_IN

VI < 0

–50

mA

IO

Continuous output current

CLK_OUT1/2

±20

mA

Continuous current through GND, VBATT, VLDO

±50

mA

TJ

Operating virtual junction temperature

–40

150

°C

TA

Operating ambient temperature range

–40

85

°C

Tstg

Storage temperature range

–55

150

°C

(1)

Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply

functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.

If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully

functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.

(2)

The input negative-voltage and output voltage ratings can be exceeded if the input and output current ratings are observed.

(3)

All voltage values are with respect to network ground pin.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)

±2000

V

Charged-device model (CDM), per JEDEC specification JESD22-C101(2)

±1000

Machine Model

200

(1)

JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 500V HBM is possible with the necessary precautions.

(2)

JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process. Manufacturing with

less than 250V CDM is possible with the necessary precautions.

6.3 Recommended Operating Conditions

See (1)

MIN

MAX

UNIT

VBATT

Input voltage to internal LDO

2.3

5.5

V

VI

Input voltage

MCLK_IN, CLK_REQ1/2

0

1.89

V

VO

Output voltage

CLK_OUT1/2

0

1.8

V

VIH

High-level input voltage

CLK_REQ1/2

1.3

1.89

V

VIL

Low-level input voltage

CLK_REQ1/2

0

0.5

V

IOH

High-level output current, DC current

–8

mA

IOL

Low-level output current, DC current

8

mA

(1)

All unused inputs of the device must be held at VCC or GND to verify proper device operation. See the Implications of Slow or Floating

CMOS Inputs application note.

CDC3RL02

SCHS371H – NOVEMBER 2009 – REVISED OCTOBER 2024

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