TSB41BA3BIPFP datasheet(20/67 Pages) TI

20 / 67 page

TSB41BA3B

IEEE 1394b THREEPORT CABLE TRANSCEIVER/ARBITER

SLLS678 − SEPTEMBER 2005

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

tsu

Dx, CTLx, LREQ

xCLK

Figure 2. Dx, CTLx, LREQ Input Setup and Hold Time Waveforms

Dx, CTLx

xCLK

Figure 3. Dx and CTLx Output Delay Relative to xCLK Waveforms

APPLICATION INFORMATION

Obtain from the Texas Instruments Web site or your local Texas Instruments representative the reference

schematics, reference layouts, debug documents, and software recommendations for the TSB41BA3B.

internal register configuration

The TSB41BA3B has 16 accessible internal registers. The configuration of the registers at addresses 0h

through 7h (the base registers) is fixed, whereas the configuration of the registers at addresses 8h through Fh

(the paged registers) depends on which of eight pages, numbered 0h through 7h, is currently selected. The

selected page is set in base register 7h. Note that while this register set is compatible with 1394a-2000 register

sets, some fields have been redefined, and this register set contains additional fields.

Table 2 shows the configuration of the base registers, and Table 3 gives the corresponding field descriptions.

The base register field definitions are unaffected by the selected page number.

A reserved register or register field (marked as Reserved or Rsvd in the following register configuration tables)

is read as 0, but is subject to future usage. All registers in address pages 2 through 6 are reserved.

TSB41BA3BIPFP Datasheet(PDF) 20 Page - Texas Instruments