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L99PM62XP Datasheet(PDF) 31 Page - STMicroelectronics |
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L99PM62XP Datasheet(HTML) 31 Page - STMicroelectronics |
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31 / 98 page ![]() L99PM62XP Description Doc ID 16363 Rev 4 31/98 2.9.1 CAN error handling The L99PM62XP provides the following 4 error handling features which are not described in the ISO 11898-2/ISO 11898-5, but are realized in different stand alone CAN transceivers / micro controllers to switch the application back to normal operation mode. Dominant TxDC time out If TXDC is in dominant state (low) for t > tdom(TxD) the transmitter is disabled, status bit is latched and can be read and optionally cleared by SPI. The transmitter remains disabled until the status register is cleared. CAN permanent recessive If TXDC changes to dominant (low) state but CAN bus does not follow for 4 times, the transmitter is disabled, status bit is latched and can be read and optionally cleared by SPI. The transmitter remains disabled until the status register is cleared. CAN permanent dominant If the bus state is dominant (low) for t > tCAN a permanent dominant status is detected. The status bit is latched and can be read and optionally cleared by SPI. The transmitter is not disabled. RXDC permanent recessive If RXDC pin is clamped to recessive (high) state, the controller is not able to recognize a bus dominant state and could start messages at any time, which results in disturbing the overall bus communication. Therefore, if RXDC does not follow TXDC for 4 times the transmitter is disabled. The status bit is latched and can be read and optionally cleared by SPI. The transmitter remains disabled until the status register is cleared. 2.9.2 Wake up (from CAN) When the L99PM62XP is in standby mode with CAN wake up option enabled, the CAN bus traffic is detected. For the wake up feature the L99PM62XP logic differentiates different conditions. During V1 Standby mode RXDC output is kept at recessive level. Independent from the wakeup pattern selected and independent from the previous Standby mode, the RXDC reflect immediately the bus state after the wakeup. This feature allows implementation of a ‘partial networking’ functionality controlled by the system microcontroller. Normal pattern wake up Normal pattern wake up can occur when CAN pattern wake up option is enabled and the CAN transceiver was set in standby mode while CAN bus was in recessive (high) state or dominant (low) state. In order to wake up the L99PM62XP, the following criteria must be fulfilled: ● The CAN interface wake-up receiver must receive a series of two consecutive valid dominant pulses, each of which must be longer than 2 µs ● The distance between 2 pulses must be longer than 2 µs. ● The two pulses must occur within a time frame of 1.0 ms |
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