DocID7531 Rev 12

31/43

M41ST85W

DC and AC parameters

43

IBAT

(2)

Battery current OSC ON

TA = 25°C, VCC = 0 V, VBAT = 3 V

400

500

nA

Battery current OSC OFF

50

nA

ICC1

Supply current

f = 400 kHz

0.75

mA

ICC2

Supply current (standby)

SCL, SDA = VCC – 0.3 V

or VSS + 0.3 V

0.50

mA

ILI

(3)

Input leakage current

0V

≤ V

IN ≤ VCC

±1

µA

Input leakage current (PFI)

–25

2

25

nA

ILO

(4)

Output leakage current

0V

≤ V

IN ≤ VCC

±1

µA

IOUT1

(5) V

OUT current (active)

VOUT1 > VCC – 0.3 V

100

mA

IOUT2

VOUT current (battery backup)

VOUT2 > VBAT – 0.3 V

100

µA

VIH

Input high voltage

0.7VCC

VCC + 0.3

V

VIL

Input low voltage

–0.3

0.3VCC

V

VBAT

Battery voltage

2.5

3.0

3.5(6)

V

VOH

Output high voltage(7)

IOH = –1.0 mA

2.4

V

Pull-up supply voltage (open drain)

RST, IRQ/FT/OUT

3.6

V

VOHB

(8)

VOH (battery backup)

IOUT2 = –1.0 µA

2.5

2.9

3.5

V

VOL

Output low voltage

IOL = 3.0 mA

0.4

V

Output low voltage (open drain)(9)

IOL = 10 mA

0.4

V

VPFD

Power fail deselect

2.55

2.60

2.70

V

VPFI

PFI input threshold

VCC = 3 V(W)

1.225

1.250

1.275

V

PFI hysteresis

PFI rising

20

70

mV

VSO

Battery backup switchover

2.5

V

1. Valid for ambient operating temperature: TA = –40 to 85°C; VCC = 2.7 to 3.6 V (except where noted).

2. Measured with VOUT and ECON open.

3. RSTIN1 and RSTIN2 internally pulled-up to VCC through 100 kΩ resistor. WDI internally pulled-down to VSS through

100 k

Ω resistor.

4. Outputs deselected.

5. External SRAM must match RTC supervisor chip VCC specification.

6. For rechargeable backup, VBAT (max) may be considered VCC.

7. For PFO and SQW pins (CMOS).

8. Conditioned output (ECON) can only sustain CMOS leakage current in the battery backup mode. Higher leakage currents

will reduce battery life.

9. For IRQ/FT/OUT, RST pins (open drain): if pulled-up to supply other than VCC, this supply must be equal to, or less than

3.0 V when VCC = 0 V (during battery backup mode).

Table 11. DC characteristics