MPC8245 datasheet(12/68 Pages) FREESCALE

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MPC8245 Integrated Processor Hardware Specifications, Rev. 10

Freescale Semiconductor

Electrical and Thermal Characteristics

4.3

Power Characteristics

Table 5 provides power consumption data for the MPC8245.

Table 5. Power Consumption

Mode

PCI Bus Clock/Memory Bus Clock/CPU Clock Frequency (MHz)

Unit

Notes

66/66/266

66/133/266

66/66/300

66/100/300

33/83/333

66/133/333

66/100/350

Typical

1.7

(1.5)

2.0

(1.8)

1.8

(1.7)

2.0

(1.8)

2.0

2.3

2.2

1, 5

Max—FP

2.2

(1.9)

2.4

(2.1)

2.3

(2.0)

2.5

(2.2)

2.6

2.8

1, 2

Max—INT

1.8

(1.6)

2.1

(1.8)

2.0

(1.8)

2.1

(1.8)

2.2

2.4

1, 3

Doze

1.1

(1.0)

1.4

(1.3)

1.2

(1.1)

1.4

(1.3)

1.4

1.6

1.5

1, 4, 6

Nap

0.4

(0.4)

0.7

(0.7)

0.4

(0.4)

0.6

(0.6)

0.5

0.7

0.6

1, 4, 6

Sleep

0.2

(0.2)

0.4

(0.4)

0.2

(0.4)

0.3

(0.3)

0.3

0.4

0.3

1, 4, 6

I/O Power Supplies 10

Mode

Min

Max

Unit

Notes

Typ—OVDD

134 (121)

334 (301)

7, 8

Typ—GVDD

324 (292)

800 (720)

7, 9

Notes:

1. The values include VDD, AVDD, and AVDD2 but do not include I/O supply power. Information on OVDD and GVDD supply

power is captured in the I/O power supplies section of this table. Values shown in parenthesis ( ) indicate power consumption

at VDD/AVDD/AVDD2 = 1.8 V.

2. Maximum—FP power is measured at VDD = 2.1 V with dynamic power management enabled while running an entirely

cache-resident, looping, floating-point multiplication instruction.

3. Maximum—INT power is measured at VDD = 2.1 V with dynamic power management enabled while running entirely

cache-resident, looping, integer instructions.

4. Power saving mode maximums are measured at VDD = 2.1 V while the device is in doze, nap, or sleep mode.

5. Typical power is measured at VDD = AVDD = 2.0 V, OVDD = 3.3 V where a nominal FP value, a nominal INT value, and a

value where there is a continuous flush of cache lines with alternating ones and zeros on 64-bit boundaries to local memory

are averaged.

6. Power saving mode data measured with only two PCI_CLKs and two SDRAM_CLKs enabled.

7. The typical minimum I/O power values were results of the MPC8245 performing cache resident integer operations at the

slowest frequency combination of 33:66:200 (PCI:Mem:CPU) MHz.

8. The typical maximum OVDD value resulted from the MPC8245 operating at the fastest frequency combination of 66:100:350

(PCI:Mem:CPU) MHz and performing continuous flushes of cache lines with alternating ones and zeros to PCI memory.

9. The typical maximum GVDD value resulted from the MPC8245 operating at the fastest frequency combination of 66:100:350

(PCI:Mem:CPU) MHz and performing continuous flushes of cache lines with alternating ones and zeros on 64-bit boundaries

to local memory.

10.Power consumption of PLL supply pins (AVDD and AVDD2) < 15 mW. Guaranteed by design and not tested.

MPC8245 Datasheet(PDF) 12 Page - Freescale Semiconductor, Inc

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