PCA2125 datasheet(21/40 Pages) NXP

21 / 40 page

PCA2125_00

Preliminary data sheet

Rev. 00.11 — 30 January 2007

21 of 40

NXP Semiconductors

PCA2125

SPI Real time clock / calendar

The timing shown for clearing MSF in Figure 13 is also valid for the non-pulsed interrupt

mode i.e. when TI/TP = 0, where the pulse may be shortened by setting both MI and SI to

‘0’.

6.7.2 Countdown timer interrupts

Generation of interrupts from the countdown timer is controlled via the TIE bit (see

Table 25).

The pulse generator for the countdown timer interrupt also uses an internal clock, but this

time it is dependent on the selected source clock for the countdown timer and on the

countdown value, n. As a consequence, the width of the interrupt pulse varies (see

Table 36).

[1]

n = loaded countdown value. Timer stopped when n = 0.

If the TF flag is clear before the end of the INT pulse, then the INT pulse is shortened. This

allows the source of a system interrupt to be cleared immediately it is serviced i.e. the

system does not have to wait for the completion of the pulse before continuing (see

Figure 14). Instructions for clearing MSF can be found in Section 6.6.3.

Fig 13. Example of shortening the INT pulse by clearing the MSF flag.

001aaf908

seconds counter

MSF

INT

SCL

instruction

CLEAR INSTRUCTION

8th clock

(1)

Table 36.

INT operation (bit TI / TP = 1)

Source clock (Hz)

INT period (s)

n = 1

[1]

n > 1

4096

⁄8192

⁄4096

⁄128

⁄64

⁄60

⁄64

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