Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 26MHz Reference Clock

Revision 1.3 (11-02-07)

6

SMSC USB3317

PRODUCT PREVIEW

7

E2

CPEN

Output,

CMOS

High

External 5 volt supply enable. This pin is

used to enable the external Vbus power

supply. The CPEN pin is low on POR.

This pad uses VDD3.3 logic level.

8

E3

DATA[7]

I/O,

CMOS

N/A

ULPI bi-directional data bus. DATA[7] is

the MSB.

9

D3

DATA[6]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

10

E4

DATA[5

I/O,

CMOS

N/A

ULPI bi-directional data bus.

11

D4

DATA[4]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

12

E5

CLKOUT

Output,

CMOS

N/A

60MHz reference clock output. All ULPI

signals are driven synchronous to the

rising edge of this clock.

13

D5

DATA[3]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

14

C4

DATA[2]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

15

C5

DATA[1]

I/O,

CMOS

N/A

ULPI bi-directional data bus.

16

B4

DATA[0]

I/O,

CMOS

N/A

ULPI bi-directional data bus. DATA[0] is

the LSB.

17

B5

VDDIO

Power

N/A

1.8V to 3.3V ULPI interface supply

voltage. This voltage sets the value of

18

A5

NXT

Output,

CMOS

High

The PHY asserts NXT to throttle the data.

When the Link is sending data to the

PHY, NXT indicates when the current

byte has been accepted by the PHY. The

Link places the next byte on the data bus

in the following clock cycle.

19

A4

DIR

Output,

CMOS

N/A

Controls the direction of the data bus.

When the PHY has data to transfer to the

Link, it drives DIR high to take ownership

of the bus. When the PHY has no data to

transfer it drives DIR low and monitors

the bus for commands from the Link.

20

A3

STP

Input,

CMOS

High

The Link asserts STP for one clock cycle

to stop the data stream currently on the

bus. If the Link is sending data to the

PHY, STP indicates the last byte of data

was on the bus in the previous cycle.

21

B3

VDD1.8

Power

N/A

External 1.8V Supply input pin. This pad

needs to be bypassed with a 0.1uF

capacitor to ground, placed as close as

possible to the USB3317.

Table 1 USB3317 Pin Description (continued)