Advance Information

The specifications of this device are subject to change without notice. For latest documentation see http://www.emlsi.com.

3

RMS132UAW

Table3: Pin Descriptions

No connection.

No Connection

NC

Power supply for output buffers.

Data Output Power/Ground

VDDQ/VSSQ

Power supply for internal circuits and input buffers.

Power Supply/Ground

VDD/VSS

Multiplexed data input/output pin.

Data Input/Output

DQ0~DQ31

Controls output buffers in read mode and masks input data in

write mode.

Data Input/Output Mask

DQM0~DQM3

RAS, CAS and WE define the operation.

Refer function truth table for details.

Row Address Strobe,

Column Address Strobe,

Write Enable

/RAS, /CAS, /WE

Row Address

: RA0~RA10

Column Address

: CA0~CA7

Auto Precharge

: A10

Address

A0~A10

Selects bank to be activated during RAS activity.

Selects bank to be read/written during CAS activity.

Bank Address

BA

Enable or disable all inputs except CLK, CKE and DQM.

Chip Select

/CS

Controls internal clock signal and when deactivated, the SDRAM

will be one of the states among power down, suspend or self

refresh.

Clock Enable

CKE

The system clock input. All other inputs are registered to the

SDRAM on the rising edge CLK.

System Clock

CLK

Descriptions

Pin Name

Pin