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STLC5465B Datasheet(PDF) 58 Page - STMicroelectronics |
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STLC5465B Datasheet(HTML) 58 Page - STMicroelectronics |
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58 / 101 page ![]() NCS0/1 NDSACK0/ DTACK / NREADY NA S/ ALE ND S/ NRD D0/15 R/W / NWR AD0/15 t2 t4 t7 t8 t12 t9 t10 t3 t1 Figure 47 : ST10 (C16x) Write Cycle; Demultiplexed A/D Symbol Parameter Min. Typ. Max. Unit t1 Delay Not Ready/NWR (if NCS0/1 = 0), (30pF) Delay when immediate access VDD =5V V DD = 3.3V 0 98 108 ns ns ns t2 Hold Time Chip Select / NRD 10 ns t3 Delay Not Ready / NWR rising edge Delay when immediate access VDD =5V V DD = 3.3V 0 98 108 ns ns ns t4 Width ALE 20 ns t7 Set up time Data/NWR -15 ns t8 Hold time Data/NWR 15 ns t9 Set-up Time NBHE, Address AD0/15, A16/23/ALE 5 ns t10 Hold Time NBHE, Address AD0/15, A16/23 NWR 10 ns t12 Delay NWR / NCS 0 ns VII - MICROPROCESSOR TIMING (continued) STLC5465B 58/101 |
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