H8SXSLASH1663 datasheet(1027/1158 Pages) RENESAS

1027 / 1158 page

Section 23 Power-Down Modes

Rev.1.00 Jun. 07, 2006 Page 975 of 1102

REJ09B0294-0100

Bit

Bit Name

Initial

Value

R/W

Description



R/W

Reserved

This bit is always read as 0. The write value should

always be 0.

STS4

STS3

STS2

STS1

STS0

R/W

Standby Timer Select 4 to 0

These bits select the time the MCU waits for the clock to

settle when software standby mode is cleared by an

external interrupt or when a transition is made from the

subclock operation to the main clock operation. For a

crystal resonator, refer to

table 23.2 and make a selection

according to the operating frequency so that the

standby

time is at least equal to the oscillation settling

time. With

an external clock, a PLL circuit settling time is

necessary.

Refer to

table 23.2 to set the standby time.

While oscillation is being settled, the timer is counted on

the P

φ clock frequency. Careful consideration is required

in multi-clock mode.

00000: Reserved

00001: Reserved

00010: Reserved

00011: Reserved

00100: Reserved

00101: Standby time = 64 states

00110: Standby time = 512 states

00111: Standby time = 1024 states

01000: Standby time = 2048 states

01001: Standby time = 4096 states

01010: Standby time = 16384 states

01011: Standby time = 32768 states

01100: Standby time = 65536 states

01101: Standby time = 131072 states

01110: Standby time = 262144 states

01111: Standby time = 524288 states

1XXXX: Reserved

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