H8SXSLASH1663R datasheet(982/1504 Pages) RENESAS

982 / 1504 page

Section 19 Serial Communication Interface (SCI, IrDA, CRC)

Rev. 2.00 Sep. 24, 2008 Page 950 of 1468

REJ09B0412-0200

19.9

Interrupt Sources

19.9.1

Interrupts in Normal Serial Communication Interface Mode

Table 19.14 shows the interrupt sources in normal serial communication interface mode. A

different interrupt vector is assigned to each interrupt source, and individual interrupt sources can

be enabled or disabled using the enable bits in SCR.

When the TDRE flag in SSR is set to 1, a TXI interrupt request is generated. When the TEND flag

in SSR is set to 1, a TEI interrupt request is generated. A TXI interrupt request can activate the

DTC or DMAC to allow data transfer. The TDRE flag is automatically cleared to 0 at data transfer

by the DTC or DMAC.

When the RDRF flag in SSR is set to 1, an RXI interrupt request is generated. When the ORER,

PER, or FER flag in SSR is set to 1, an ERI interrupt request is generated. An RXI interrupt can

activate the DTC or DMAC to allow data transfer. The RDRF flag is automatically cleared to 0 at

data transfer by the DTC or DMAC.

A TEI interrupt is requested when the TEND flag is set to 1 while the TEIE bit is set to 1. If a TEI

interrupt and a TXI interrupt are requested simultaneously, the TXI interrupt has priority for

acceptance. However, note that if the TDRE and TEND flags are cleared to 0 simultaneously by

the TXI interrupt processing routine, the SCI cannot branch to the TEI interrupt processing routine

later.

Note that the priority order for interrupts is different between the group of SCI_0, 1, 2, and 4 and

the group of SCI_5 and SCI_6.

Table 19.14 SCI Interrupt Sources (SCI_0, 1, 2, and 4)

Name

Interrupt Source

Interrupt Flag

DTC Activation

DMAC Activation

Priority

ERI

Receive error

ORER, FER, or PER

Not possible

RXI

Receive data full

RDRF

Possible

TXI

Transmit data empty TDRE

Possible

High

TEI

Transmit end

TEND

Not possible

Low

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