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H8SX/1663R Datasheet(PDF) 1119 Page - Renesas Technology Corp |
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H8SX/1663R Datasheet(HTML) 1119 Page - Renesas Technology Corp |
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1119 / 1504 page ![]() Section 22 A/D Converter Rev. 2.00 Sep. 24, 2008 Page 1087 of 1468 REJ09B0412-0200 Table 22.6 A/D Conversion Time (Scan Mode) (Unit 1) EXCKS CKS1 CKS0 Conversion Time (Number of States) 0 512 (fixed) 0 1 256 (fixed) 0 128 (fixed) 0 1 1 64 (fixed) 0 320 (fixed) 0 1 160 (fixed) 0 80 (fixed) 1 1 1 40 (fixed) 22.4.4 External Trigger Input Timing A/D conversion can be externally triggered. For unit 0, an external trigger is input from the ADTRG0 pin when the TRGS1, TRGS0, and EXTRGS bits are set to B'110 in ADCR_0. For unit 1, an external trigger is input from the ADTRG1 pin when the TRGS1, TRGS0, and EXTRGS bits are set to B'110 in ADCR_1. A/D conversion starts when the ADST bit in ADCSR is set to 1 on the falling edge of the ADTRG pin. Other operations, in both single and scan modes, are the same as when the ADST bit has been set to 1 by software. Figure 22.7 shows the timing. Also, A/D conversion for multiple units can be externally triggered (multiple units can start simultaneously). For units 0 and 1, an external trigger is input from the ADTRG0 pin when the TRGS1, TRGS0, and EXTRGS bits are set to B'111 in ADCR_0 and ADCR_1. A/D conversion starts when the ADST bit in ADCSR is set to 1 on the falling edge of the ADTRG pin. The timing is different from the one when multiple units do not start simultaneously. Figure 22.8 shows the timing. |
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