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H8SX/1663R Datasheet(PDF) 1200 Page - Renesas Technology Corp |
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H8SX/1663R Datasheet(HTML) 1200 Page - Renesas Technology Corp |
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1200 / 1504 page  Section 25 Flash Memory Rev. 2.00 Sep. 24, 2008 Page 1168 of 1468 REJ09B0412-0200 25.9.2 Software Protection The software protection protects the flash memory against programming/erasure by disabling download of the programming/erasing program, using the key code, and by the RAMER setting. Table 25.14 Software Protection Function to be Protected Item Description Download Programming/ Erasing Protection by SCO bit The programming/erasing protection state is entered when the SCO bit in FCCS is cleared to 0 to disable download of the programming/erasing programs. O O Protection by FKEY The programming/erasing protection state is entered because download and programming/erasure are disabled unless the required key code is written in FKEY. O O Emulation protection The programming/erasing protection state is entered when the RAMS bit in the RAM emulation register (RAMER) is set to 1. O O 25.9.3 Error Protection Error protection is a mechanism for aborting programming or erasure when a CPU runaway occurs or operations not according to the programming/erasing procedures are detected during programming/erasure of the flash memory. Aborting programming or erasure in such cases prevents damage to the flash memory due to excessive programming or erasing. If an error occurs during programming/erasure of the flash memory, the FLER bit in FCCS is set to 1 and the error protection state is entered. • When an interrupt request, such as NMI, occurs during programming/erasure. • When the flash memory is read from during programming/erasure (including a vector read or an instruction fetch). • When a SLEEP instruction is executed (including software-standby mode) during programming/erasure. • When a bus master other than the CPU, such as the DMAC and DTC, obtains bus mastership during programming/erasure. |
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