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H8SX/1663R Datasheet(PDF) 1270 Page - Renesas Technology Corp |
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H8SX/1663R Datasheet(HTML) 1270 Page - Renesas Technology Corp |
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1270 / 1504 page ![]() Section 28 Power-Down Modes Rev. 2.00 Sep. 24, 2008 Page 1238 of 1468 REJ09B0412-0200 Main clock operation (CK32K = 0) Subclock operation (CK32K = 1) Notes: 1. NMI, IRQ0 to IRQ11, 8-bit timer interrupt, watchdog timer interrupt, 32K timer interrupt, and voltage monitoring interrupt*6. Note that the 8-bit timer interrupt is valid when the MSTPCRA9 or MSTPCRA8 bit is cleared to 0. 2. NMI, IRQ0 to IRQ11, 32K timer interrupt, USB suspend/resume interrupt, and voltage monitoring interrupt*6. Note that IRQ, 32K timer, or USB interrupts is valid only when the corresponding bit in SSIER is set to 1. 3. The SLPIE bit is cleared to 0. 4. NMI, IRQ0-A to IRQ3-A, 32K timer interrupts, USB suspend/resume interrupts, and voltage monitoring interrupt*6. Note that IRQ, 32K timer, USB, suspend/resume, and voltage monitoring*6 interrupts are valid only when the corresponding bit in DPSIER is set to 1. 5. If a conflict between a transition to deep software standby mode and generation of software standby mode clearing source occurs, a mode transition may be made from software standby mode to program execution state through execution of interrupt exception handling. In this case, a transition to deep software standby mode is not made. For details, refer to section 28.12, Usage Notes. 6. Supported only by the H8SX/1668M Group. Note: From any state, a transition to hardware standby mode occurs when STBY is driven low. From any state except hardware standby mode, a transition to the reset state occurs when RES is driven low. Reset state Program execution state Hardware standby mode Internal reset state Software standby mode SSBY = 0 SSBY = 0, ACSE = 1 MSTPCR = H'F[C-F]FFFFFF STBY pin = High RES pin = Low RES pin = Low STBY pin = Low RES pin = High SLEEP instruction *3 SLEEP instruction*3 SLEEP instruction *3 Interrupt *1 Interrupt *2 (SSBY =1) (SSBY =1) All interrupts SLEEP instruction SLEEP instruction SLEEP instr uction All interrupts CK32K = 0 CK32K = 1 Transition after exception handling [Legend] Deep software standby mode Sleep mode All-module-clock- stop mode Program execution state Program halted state Program halted state Software standby mode SSBY = 0 SSBY = 0, ACSE = 1 MSTPCR = H'F[C-F]FFFFFF Sleep mode All-module-clock- stop mode Interrupt *1 WAKE32K = 1 and Interrupt *2 WAKE32K = 0 and Interrupt *2 (DPSBY = 1 and no interrupt is generated*5) Deep software standby mode (DPSBY = 1 and no interrupt is generated*5) (DPSBY = 0 and no interrupt is generated) (DPSBY = 0 and no interrupt is generated) Interrupt *4 Interrupt *4 Figure 28.1 Mode Transitions |
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