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H8SX/1663R Datasheet(PDF) 1308 Page - Renesas Technology Corp |
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H8SX/1663R Datasheet(HTML) 1308 Page - Renesas Technology Corp |
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1308 / 1504 page ![]() Section 28 Power-Down Modes Rev. 2.00 Sep. 24, 2008 Page 1276 of 1468 REJ09B0412-0200 (3) Deep Software Standby Mode in External Extended Mode (IOKEEP = 0) Figure 28.6 shows an example of operations in deep software standby mode with the IOKEEP bit is set to 1 and the OPE bit is cleared to 0 in external extended mode. When the IOKEEP bit is cleared to 0, retention of the states of pins including the address bus, bus-control signals ( CS0, AS, RD, HWR, and LWR), data bus, and other pins including Bφ output is released after the oscillation settling time has elapsed. SLEEP instruction Deep software standby mode (power-down mode) Program execution state Program execution state Reset exception handling Oscillator I φ NMI Internal reset Operated Retained Address Retained Bus control Retained Data B φ Retained Retained I/O other than above Started from h'00000 Operated Operated Operated Operated Operated Oscillation settling time Figure 28.6 Example of Deep Software Standby Mode Operation in External Extended Mode (IOKEEP = OPE = 0) |
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