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H8SX/1663R Datasheet(PDF) 1332 Page - Renesas Technology Corp

Part # H8SX/1663R
Description  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663R Datasheet(HTML) 1332 Page - Renesas Technology Corp

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Section 29 List of Registers
Rev. 2.00 Sep. 24, 2008 Page 1300 of 1468
REJ09B0412-0200
Register Name
Abbreviation
Number
of Bits
Address
Module
Data
Width
Access
Cycles
(Read/Write)
Flash MAT select register
FMATS
8
H'FFDED
FLASH
16
2I
φ/2Iφ
Flash transfer destination address register
FTDAR
8
H'FFDEE
FLASH
16
2I
φ/2Iφ
Deep standby control register
DPSBYCR
8
H'FFE70
SYSTEM
8
2I
φ/3Iφ
Deep standby wait control register
DPSWCR
8
H'FFE71
SYSTEM
8
2I
φ/3Iφ
Deep standby interrupt enable register
DPSIER
8
H'FFE72
SYSTEM
8
2I
φ/3Iφ
Deep standby interrupt flag register
DPSIFR
8
H'FFE73
SYSTEM
8
2I
φ/3Iφ
Deep standby interrupt edge register
DPSIEGR
8
H'FFE74
SYSTEM
8
2I
φ/3Iφ
Reset status register
RSTSR
8
H'FFE75
SYSTEM
8
2I
φ/3Iφ
Low voltage detection control register
LVDCR
8
H'FFE78
SYSTEM
8
2I
φ/3Iφ
Serial extended mode register_2
SEMR_2
8
H'FFE84
SCI_2
8
2P
φ/2Pφ
Serial mode register_4
SMR_4
8
H'FFE90
SCI_4
8
2P
φ/2Pφ
Bit rate register_4
BRR_4
8
H'FFE91
SCI_4
8
2P
φ/2Pφ
Serial control register_4
SCR_4
8
H'FFE92
SCI_4
8
2P
φ/2Pφ
Transmit data register_4
TDR_4
8
H'FFE93
SCI_4
8
2P
φ/2Pφ
Serial status register_4
SSR_4
8
H'FFE94
SCI_4
8
2P
φ/2Pφ
Receive data register_4
RDR_4
8
H'FFE95
SCI_4
8
2P
φ/2Pφ
Smart card mode register_4
SCMR_4
8
H'FFE96
SCI_4
8
2P
φ/2Pφ
I
2C bus control register A_0
ICCRA_0
8
H'FFEB0
IIC2_0
8
2P
φ/2Pφ
I
2C bus control register B_0
ICCRB_0
8
H'FFEB1
IIC2_0
8
2P
φ/2Pφ
I
2C bus mode register_0
ICMR_0
8
H'FFEB2
IIC2_0
8
2P
φ/2Pφ
I
2C bus interrupt enable register_0
ICIER_0
8
H'FFEB3
IIC2_0
8
2P
φ/2Pφ
I
2C bus status register_0
ICSR_0
8
H'FFEB4
IIC2_0
8
2P
φ/2Pφ
Slave address register_0
SAR_0
8
H'FFEB5
IIC2_0
8
2P
φ/2Pφ
I
2C bus transmit data register_0
ICDRT_0
8
H'FFEB6
IIC2_0
8
2P
φ/2Pφ
I
2C bus receive data register_0
ICDRR_0
8
H'FFEB7
IIC2_0
8
2P
φ/2Pφ
I
2C bus control register A_1
ICCRA_1
8
H'FFEB8
IIC2_1
8
2P
φ/2Pφ
I
2C bus control register B_1
ICCRB_1
8
H'FFEB9
IIC2_1
8
2P
φ/2Pφ
I
2C bus mode register_1
ICMR_1
8
H'FFEBA
IIC2_1
8
2P
φ/2Pφ
I
2C bus interrupt enable register_1
ICIER_1
8
H'FFEBB
IIC2_1
8
2P
φ/2Pφ
I
2C bus status register_1
ICSR_1
8
H'FFEBC
IIC2_1
8
2P
φ/2Pφ
Slave address register_1
SAR_1
8
H'FFEBD
IIC2_1
8
2P
φ/2Pφ



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