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H8SX/1663R Datasheet(PDF) 1400 Page - Renesas Technology Corp |
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H8SX/1663R Datasheet(HTML) 1400 Page - Renesas Technology Corp |
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1400 / 1504 page ![]() Section 30 Electrical Characteristics Rev. 2.00 Sep. 24, 2008 Page 1368 of 1468 REJ09B0412-0200 Item Symbol Min. Max. Unit. Test Conditions External clock output delay settling time t DEXT 1 ms Figure 30.4 External clock input low pulse width t EXL 27.7 ns External clock input high pulse width t EXH 27.7 ns External clock rising time t EXr 5 ns External clock falling time t EXf 5 ns Subclock oscillation settling time t OSC3 2 s Subclock oscillator oscillation frequency f SUB 32.768 32.768 kHz Subclock cycle time t SUB 30.5 30.5 µs Figure 30.5 Note: * V CC = PLLVCC = DrVCC = 2.95 V to 3.60 V in the H8SX/1668M Group. tcyc B φ tCH tCf tCL tCr Figure 30.2 External Bus Clock Timing Oscillator Software standby mode (power-down mode) Oscillation settling time tOSC2 I φ NMI NMI exception handling NMIEG = 1 SSBY = 1 NMI exception handling SLEEP instruction NMIEG SSBY Figure 30.3 Oscillation Settling Timing after Software Standby Mode |
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