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H8SX/1663R Datasheet(PDF) 1402 Page - Renesas Technology Corp |
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H8SX/1663R Datasheet(HTML) 1402 Page - Renesas Technology Corp |
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1402 / 1504 page  Section 30 Electrical Characteristics Rev. 2.00 Sep. 24, 2008 Page 1370 of 1468 REJ09B0412-0200 30.4.2 Control Signal Timing Table 30.7 Control Signal Timing Conditions: V CC = PLLVCC = DrVCC = 3.0 V to 3.6 V*, AVCC = 3.0 V to 3.6 V, Vref = 3.0 V to AV CC, VSS = PLLVSS = DrVSS = AVSS = 0 V, Iφ = 8 MHz to 50 MHz, T a = –20°C to +75°C (regular specifications), T a = –40°C to +85°C (wide-range specifications) Item Symbol Min. Max. Unit Test Conditions RES setup time t RESS 200 ns Figure 30.6 RES pulse width t RESW 20 t cyc NMI setup time t NMIS 150 ns Figure 30.7 NMI hold time t NMIH 10 ns NMI pulse width (after leaving software standby mode) t NMIW 200 ns IRQ setup time t IRQS 150 ns IRQ hold time t IRQH 10 ns IRQ pulse width (after leaving software standby mode) t IRQW 200 ns Note: * V CC = PLLVCC = DrVCC = 2.95 V to 3.60 V in the H8SX/1668M Group. I φ RES t RESS t RESS t RESW Figure 30.6 Reset Input Timing |
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