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H8SX/1663R Datasheet(PDF) 1403 Page - Renesas Technology Corp |
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H8SX/1663R Datasheet(HTML) 1403 Page - Renesas Technology Corp |
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1403 / 1504 page ![]() Section 30 Electrical Characteristics Rev. 2.00 Sep. 24, 2008 Page 1371 of 1468 REJ09B0412-0200 I φ NMI IRQi* (i = 0 to 11) IRQ* (edge input) Note: * SSIER must be set to cancel software standby mode. IRQ* (level input) t NMIS t NMIH t IRQS t IRQS t IRQH t NMIW t IRQW Figure 30.7 Interrupt Input Timing 30.4.3 Bus Timing Table 30.8 Bus Timing (1) Conditions: V CC = PLLVCC = DrVCC = 3.0 V to 3.6 V*, AVCC = 3.0 V to 3.6 V, Vref = 3.0 V to AV CC, VSS = PLLVSS = DrVSS = AVSS = 0 V, Bφ = 8 MHz to 50 MHz, T a = –20°C to +75°C (regular specifications), T a = –40°C to +85°C (wide-range specifications) Item Symbol Min. Max. Unit Test Conditions Address delay time t AD 15 ns Address setup time 1 t AS1 0.5 × t cyc – 8 ns Figures 30.8 to 30.36 Address setup time 2 t AS2 1.0 × t cyc – 8 ns Address setup time 3 t AS3 1.5 × t cyc – 8 ns Address setup time 4 t AS4 2.0 × t cyc – 8 ns Address hold time 1 t AH1 0.5 × t cyc – 8 ns Address hold time 2 t AH2 1.0 × t cyc – 8 ns Address hold time 3 t AH3 1.5 × t cyc – 8 ns |
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