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M32C/86 Datasheet(PDF) 360 Page - Renesas Technology Corp |
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M32C/86 Datasheet(HTML) 360 Page - Renesas Technology Corp |
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360 / 505 page ![]() Page 337 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 23. CAN Module ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M 23.1.15 CANi Error Factor Register (CiEFR Register) (i=0, 1) Figure 23.17 C0EFR and C1EFR Registers The CiEFR register indicates the cause of error when a communication error is detected. Set the follow- ing bits to "0" by program because they are not changed "1" to "0" automatically. Use the MOV instruction, instead of the bit clear instruction, to set each bit in the CiEFR register to "0". Bits not being changed to "0" must be set to "1". For example: To set the ACKE bit for CAN0 to "0" Assembly language: mov.b #0FEh, C0EFR C language: c0efr = 0xFE; 23.1.15.1 ACKE Bit The ACKE bit is set to "1" when an ACK error is detected. 23.1.15.2 CRCE Bit The CRC bit is set to "1" when a CRC error is detected. 23.1.15.3 FORME Bit The FORME bit is set to "1" when a form error is detected. 23.1.15.4 STFE Bit The STFE bit is set to "1" when a stuff error is detected. 23.1.15.5 BITE0 Bit The BITE0 bit is set to "1" when a bit error is detected while transmitting recessive "H". 23.1.15.6 BITE1 Bit The BITE1 bit is set to "1" when a bit error is detected while transmitting dominant "L". 23.1.15.7 RCVE Bit The RCVE bit is set to "1" when an error is detected while receiving data. 23.1.15.8 TRE Bit The TRE bit is set to "1" when an error is detected while transmitting data. CANi Error Factor Register (i=0, 1) Symbol Address After Reset(1) C0EFR 021616 0016 C1EFR 029616 0016 RW ACKE CRCE FORME ACK Error Detect Bit(2) CRC Error Detect Bit(2) FORM Error Detect Bit(2) 0: Detects no ACK error 1: Detects an ACK error 0: Detects no CRC error 1: Detects a CRC error 0: Detects no form error 1: Detects a form error STFE Stuff Error Detect Bit(2) 0: Detects no stuff error 1: Detects a stuff error BITE0 Bit Error Detect Bit 0(2) 0: Detects no bit error while transmitting "H" 1: Detects a bit error while transmitting "H" 0: Detects no bit error while transmitting "L" 1: Detects a bit error while transmitting "L" RCVE Receive Error Detect Bit(2) 0: Detects no error while receiving data 1: Detects an error while receiving data TRE Transmit Error Detect Bit(2) 0: Detects no error while transmitting data 1: Detects an error while transmitting data BITE1 Bit Error Detect Bit 1(2) Bit Name Function Bit Symbol RW RW RW RW RW RW RW RW NOTES: 1. Value is obtained by setting the SLEEP bit in the CiSLPR register to "1" (sleep mode exited) after reset and supplying the clock to the CAN module. 2. Set to "0" by program. If it is set to "1", the value before setting to "1" remains. b7 b6 b5 b4 b3 b2 b1 b0 |
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