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M32C/86 Datasheet(PDF) 364 Page - Renesas Technology Corp |
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M32C/86 Datasheet(HTML) 364 Page - Renesas Technology Corp |
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364 / 505 page  Page 341 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 23. CAN Module ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M 23.1.18 CANi Single-Shot Status Register (CiSSSTR Register) (i=0, 1) Figure 23.21 C0SSSTR and C1SSSTR Registers If the arbitration lost or transmission error causes a transmission failure, the bit corresponding to mes- sage slot j (j=0 to 15) is set to "1". The SSSj bit is set to "0" by program because it is not set to "0" automatically. Use the MOV instruction, instead of the bit clear instruction, to set the SSSj bit to "0". Bits not being changed to "0" must be set to "1". For example: To set the SSS0 bit for CAN0 to "0" Assembly language: mov.w #07FFFh, C0SSSTR C language: c0ssstr = 0x7FFF; CANi Single-Shot Status Register (i=0, 1)(1) Symbol Address After Reset(2) C0SSSTR 022516 - 022416 000016 C1SSSTR 02A516 - 02A416 000016 RW SSS15 SSS14 SSS13 SSS12 SSS11 SSS10 Message Slot 15 Single-Shot Status Bit SSS9 SSS8 SSS7 SSS6 SSS5 Message Slot 14 Single-Shot Status Bit Message Slot 13 Single-Shot Status Bit Message Slot 12 Single-Shot Status Bit Message Slot 11 Single-Shot Status Bit Message Slot 10 Single-Shot Status Bit Message Slot 9 Single-Shot Status Bit Message Slot 8 Single-Shot Status Bit Message Slot 7 Single-Shot Status Bit Message Slot 6 Single-Shot Status Bit Message Slot 5 Single-Shot Status Bit Message Slot 4 Single-Shot Status Bit Message Slot 3 Single-Shot Status Bit Message Slot 2 Single-Shot Status Bit Message Slot 1 Single-Shot Status Bit Message Slot 0 Single-Shot Status Bit SSS4 SSS3 SSS2 SSS1 SSS0 0: No arbitration is lost, or no transmit error occurs 1: Arbitration is lost, or transmit error occurs Bit Name Function Bit Symbol RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW RW (Note 3) NOTES: 1. The CiSSSTR register can be accessed only when the BANKSEL bit in the CiCTLR1 is set to "0" (message slot control register and single-shot register selected). 2.Value is obtained by setting the SLEEP bit in the CiSLPR register to "1" (sleep mode exited) after reset and supplying the clock to the CAN module. 3. Set to "0" by program. When it is set it to "1", the value before setting to "1" remains. b7 b0 b15 b8 |
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