Electronic Components Datasheet Search
  British  ▼
ALLDATASHEET.CO.UK

X  

Preview PDF HTML

M32C/86 Datasheet(PDF) 310 Page - Renesas Technology Corp

Part # M32C/86
Description  RENESAS 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
PDF  505 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M32C/86 Datasheet(HTML) 310 Page - Renesas Technology Corp

Back Button M32C/86 Datasheet HTML 306Page - Renesas Technology Corp M32C/86 Datasheet HTML 307Page - Renesas Technology Corp M32C/86 Datasheet HTML 308Page - Renesas Technology Corp M32C/86 Datasheet HTML 309Page - Renesas Technology Corp M32C/86 Datasheet HTML 310Page - Renesas Technology Corp M32C/86 Datasheet HTML 311Page - Renesas Technology Corp M32C/86 Datasheet HTML 312Page - Renesas Technology Corp M32C/86 Datasheet HTML 313Page - Renesas Technology Corp M32C/86 Datasheet HTML 314Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 310 / 505 page
background image
Page 287
9
7
4
f
o
5
0
0
2
,
8
0
.
p
e
S
0
0
.
1
.
v
e
R
0
0
1
0
-
4
0
2
0
B
9
0
J
E
R
22. Intelligent I/O (Waveform Generating Function)
)
T
6
8
/
C
2
3
M
,
6
8
/
C
2
3
M
(
p
u
o
r
G
6
8
/
C
2
3
M
Table 22.11 SR Waveform Output Mode Specifications (Continued)
Item
Specification
Waveform Output Start Condition(5) The IFEq bit (q=0 to 7) in the G1FE register is set to "1" (channel q function
enabled)
Waveform Output Stop Condition
The IFEq bit is set to "0" (channel q function disabled)
Interrupt Request
The PO1jR bit in the interrupt request register is set to "1" (interrupt requested)
when the value of the base timer matches that of the G1POj register.
The PO1kR bit in the interrupt request register is set to "1" (imterrupt requested)
when the value of the base timer matches that of the G1POk register. (See
Figure 11.14)
OUTC1j Pin
Pulse signal output pin
Selectable Function
• Default value set function: Set starting waveform output level
• Inversed output function
Waveform output level is inversed to provide a waveform from the OUTC1j pin
NOTES:
5. Set the FSCj bit in the G1FS register to "0" (waveform generating function selected).



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com