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M32C/86 Datasheet(PDF) 319 Page - Renesas Technology Corp |
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M32C/86 Datasheet(HTML) 319 Page - Renesas Technology Corp |
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319 / 505 page  Page 296 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 22. Intelligent I/O (Communication Function) ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M Figure 22.27 G1IRF Register, G0TB and G1TB / G0DR and G1DR Registers SI/O Special Communication Interrupt Detect Register 1(1,2) Symbol Address After Reset G1IRF 013E16 0016 RW RW RW RW RW RW RW RW Bit Name Function Bit Symbol NOTES: 1. The G1IRF register is used in special communication mode or HDLC data processing mode. It must be in a reset state or set to "0016" in clock synchronous serial I/O mode or UART mode. 2. The SRT1R bit in the IIO4IR register is also set to "1" if the BSERR, ABT or IRF0 to IRF3 bit is set to "1". Reserved Bit Set to "0" ABT BSERR (b1 - b0) Arbitration Lost Detect Flag Bit Stuffing Error Detect Flag 0 : Not detected 1 : Detected 0 : Not detected 1 : Detected IRF0 IRF1 IRF2 Interrupt Cause Determination Flag 0 IRF3 Interrupt Cause Determination Flag 1 Interrupt Cause Determination Flag 2 Interrupt Cause Determination Flag 3 b7 b6 b5 b4 b3 b2 b1 b0 0 : The G1DR register (receive data register) does not match the G1CMP0 register 1 : The G1DR register (receive data register) matches the G1CMP0 register 0 : The G1DR register (receive data register) does not match the G1CMP1 register 1 : The G1DR register (receive data register) matches the G1CMP1 register 0 : The G1DR register (receive data register) does not match the G1CMP2 register 1 : The G1DR register (receive data register) matches the G1CMP2 register 0 : The G1DR register (receive data register) does not match the G1CMP3 register 1 : The G1DR register (receive data register) matches the G1CMP3 register 0 0 Transmit Buffer (Receive Data) Register (i=0,1) Symbol Address After Reset G0TB, G0DR 00EA16 Indeterminate G1TB, G1DR 012A16 Indeterminate RW RW Function b7 b0 Set data to be transmitted. In HDLC data processing mode, the receive data register is read by reading the GiTB register. Value is written to the transmit buffer register by writing it to the GiTB register. In HDLC data processing mode, the value set in the GiRI register is transferred to the GiDR register. |
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