LPC2921 datasheet(2/81 Pages) PHILIPS

2 / 81 page

LPC2921_2923_2925_0

Preliminary data sheet

Rev. 00.01 — 24 October 2008

2 of 81

NXP Semiconductors

LPC2921/2923/2925

ARM9 microcontroller with CAN and LIN

Other peripherals:

Two 10-bit ADCs, 8-channels each, with 3.3 V measurement range provide 8

analog inputs each with conversion times as low as 2.44

μs per channel. Each

channel provides a compare function to minimize interrupts.

Multiple trigger-start option for all ADCs: timer, PWM, other ADC and external

signal input.

Four 32-bit timers each containing four capture-and-compare registers linked to

I/Os.

Four six-channel PWMs (Pulse-Width Modulators) with capture and trap

functionality.

Two dedicated 32-bit timers to schedule and synchronize PWM and ADC.

Quadrature encoder interface that can monitor one external quadrature encoder.

32-bit watchdog with timer change protection, running on safe clock.

Up to 60 general-purpose I/O pins with programmable pull-up, pull-down, or bus

keeper.

Vectored Interrupt Controller (VIC) with 16 priority levels.

Up to 16 level-sensitive external interrupt pins, including USB, CAN and LIN wake-up

features.

Configurable clock-out pin for driving external system clocks.

Processor wake-up from power-down via external interrupt pins; CAN or LIN activity.

Flexible Reset Generator Unit (RGU) able to control resets of individual modules.

Flexible Clock-Generation Unit (CGU) able to control clock frequency of individual

modules:

On-chip very low-power ring oscillator; fixed frequency of 0.4 MHz; always on to

provide a Safe_Clock source for system monitoring.

On-chip crystal oscillator with a recommended operating range from 10 MHz to

25 MHz. PLL input range 10 MHz to 25 MHz.

On-chip PLL allows CPU operation up to a maximum CPU rate of 125 MHz.

Generation of up to 11 base clocks.

Seven fractional dividers.

Second, dedicated CGU with its own PLL generates the USB clock and a configurable

clock output.

Highly configurable system Power Management Unit (PMU):

clock control of individual modules.

allows minimization of system operating power consumption in any configuration.

Standard ARM test and debug interface with real-time in-circuit emulator.

Boundary-scan test supported.

ETM/ETB debug functions with 8 kB of dedicated SRAM also accessible for

application code and data storage.

Dual power supply:

CPU operating voltage: 1.8 V

± 5%.

I/O operating voltage: 2.7 V to 3.6 V; inputs tolerant up to 5.5 V.

100-pin LQFP package.

−40 °C to +85 °C ambient operating temperature range.

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