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PCF2127AT/1 Datasheet(PDF) 4 Page - NXP Semiconductors |
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PCF2127AT/1 Datasheet(HTML) 4 Page - NXP Semiconductors |
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4 / 80 page  PCF2127A_2 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 7 May 2010 4 of 80 NXP Semiconductors PCF2127A Integrated RTC, TCXO and quartz crystal 7. Pinning information 7.1 Pinning 7.2 Pin description Top view. For mechanical details, see Figure 53. Fig 2. Pin configuration for SO20 (PCF2127A) PCF2127A SCL VDD SDI VBAT SDO BBS SDA/CE INT IFS RST TS PFI CLKOUT PFO VSS TEST n.c. n.c. n.c. n.c. 001aaj676 1 2 3 4 5 6 7 8 9 10 12 11 14 13 16 15 18 17 20 19 Table 3. Pin description of SO20 (PCF2127A) Symbol Pin Description SCL 1 combined serial clock input for both I2C-bus and SPI-bus; may float when SDA/CE inactive SDI 2 serial data input for SPI-bus; may float when SDA/CE inactive SDO 3 serial data output for SPI-bus, push-pull SDA/CE 4 combined serial data input and output for the I2C interface and chip enable input (active LOW) for the SPI-bus IFS 5 interface selector input connect to pin VSS to select the SPI-bus connect to pin BBS to select the I2C interface TS 6 timestamp input (active LOW) with 200 k Ω internal pull-up resistor (RPU) CLKOUT 7 clock output (open-drain) VSS 8 ground supply voltage n.c. 9 to 12 not connected; do not connect; do not use as feed through TEST 13 do not connect; do not use as feed through PFO 14 power fail output (open-drain; active LOW) PFI 15 power fail input RST 16 reset output (open-drain; active LOW) INT 17 interrupt output (open-drain; active LOW) BBS 18 output voltage (battery backed) VBAT 19 battery supply voltage (backup) VDD 20 supply voltage |
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