VSC060 datasheet(13/166 Pages) MAXIM

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VSC060

Data Sheet

Revision 4.1

January 2008

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the fourth group supports the port bypass control function

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the fifth group supports fan speed monitoring

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the sixth group supports pulse-width modulated fan speed control

The VSC060 device contains 228 registers to support all required functions. In normal I/O operation, each

8-bit group of I/O pins are controlled by a pair of registers, Port Data and Data Direction. The use of these

pairs of registers allows each I/O line to be individually configured as an input with internal pull-up, output

or open-drain output with internal pull-up.

The bit control features are enabled through a separate register for each I/O pin. The Bit Control registers

allow the user to independently configure each I/O pin to enable one of the special control features, as well

as to control Port Data and Data Direction (which are shadowed copies of the standard control bits found

in the Port Data and Data Direction registers). Each I/O pin that has been configured as an input can also

be configured to assert the open-drain interrupt pin when a rising edge, a falling edge, or either edge is

detected on the I/O pin. An Interrupt Status register provides the user with a binary indication of which I/O

pin is the source of the current interrupt. Each I/O pin that is configured as an output can automatically

generate one of seven selectable flashing rates, which can be driven in an open source or open drain mode.

Additionally, two of the standard flash rates can be modified as well as eight dedicated programmable

circuits to generate user defined pulse trains for unique flashing sequences. By providing all I/O control

capability in a single register, the user can control the operation of the I/O on a pin-by-pin basis. Two

additional bits in the odd-numbered bit control registers of each port can configure the pin as an output,

which follows the corresponding even-numbered input of each port. As an example, P0.0 becomes the

input source of P0.1, which would be programmed as an output operating in one of the three available

modes. The outputs can be configured as totem pole, open-drain or open-source drive, allowing a closer

approximation of the input driver.

The Port Bypass registers control the operation of a selected group of I/O lines, which can be dedicated to

support various combinations of individual PBC/CRU/SDU functions and integrated solutions. Enabling

port bypass control causes the normal or bit control register settings to be overridden. Any further changes

to the affected registers have no effect. Each Port Bypass Control register automatically configures the I/O

lines to support a Force Bypass output and a Signal Detected input.

The Fan Speed registers control the operation of eight programmable inputs that can be used to monitor

signals from fans equipped with tachometer outputs. Enabling fan speed control causes the normal or bit

control register settings to be overridden. Any further changes to the affected registers have no effect. Each

group of three registers provides the capability to enable the function, to establish a user-defined RPM

overflow value that indicates a failure, and to determine the current RPM value of the fan. The digital

filters on the fan speed inputs can be enabled to increase the normal 100 ns to 200 ns filter to 400 ns to

500 ns.

The Pulse-Width Modulation Control registers enable internal logic to provide duty cycles of 0% to 100%

in 3% increments at default frequencies of 26 kHz, 52 kHz, and 104 kHz. Optionally, the PWM outputs

can be programmed for three additional frequency ranges of 5.2 kHz, 10.4 kHz, and 20.8 kHz or 1.04 kHz

2.08 kHz, and 4.16 kHz or 208 Hz, 416 Hz and 833 Hz. These outputs can vary the speed of up to eight

fans through the use of external drivers and power MOSFETs or pulse-width to voltage converters. They

can also be used to support other pulse-width modulated requirements within the system.

VSC060 Datasheet(PDF) 13 Page - Maxim Integrated Products

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