TNETEL1200

EtherLoop

™ MODEM

SPHS003D – FEBRUARY 1999 – REVISED JUNE 1999

5

POST OFFICE BOX 655303

Terminal Functions

microprocessor

TERMINAL

I/O†

DESCRIPTION

NAME

NO.

I/O†

DESCRIPTION

UPADDR_7

UPADDR_6

UPADDR_5

UPADDR_4

UPADDR_3

UPADDR_2

UPADDR_1

UPADDR_0

30

31

32

33

35

36

37

38

I

Bits 7–0 of the microprocessor address bus; used to address the register file.

UPCSN

27

I

Microprocessor chip-select line (active low). UPCSN is used to initiate an access to the register file.

UPDAT_15

UPDAT_14

UPDAT_13

UPDAT_12

UPDAT_11

UPDAT_10

UPDAT_9

UPDAT_8

UPDAT_7

UPDAT_6

UPDAT_5

UPDAT_4

UPDAT_3

UPDAT_2

UPDAT_1

UPDAT_0

2

3

5

6

8

9

11

12

14

15

17

18

20

21

23

24

I/O

Bits 15–0 of the microprocessor data bus; used to communicate with the register file.

UPOEN

28

I

Microprocessor output-enable line (active low). UPOEN enables the output onto the data bus.

UPRWN

26

I

Microprocessor read/write line. UPRWN is used to differentiate between reads and writes to the register file.

† I = input, O = output

system

TERMINAL

I/O†

DESCRIPTION

NAME

NO.

I/O†

DESCRIPTION

RESET

45

I

System reset. If RESET is set low, it sets all flip-flops to initial state.

XTAL

42

I

System clock. Frequency is 80 MHz, 50% duty cycle.

† I = input, O = output