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WM9093ECS/R Datasheet(PDF) 73 Page - Wolfson Microelectronics plc |
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WM9093ECS/R Datasheet(HTML) 73 Page - Wolfson Microelectronics plc |
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73 / 84 page  Production Data WM9093 w PD, March 2012, Rev 4.2 73 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R89 (59h) DC Servo Readback 1 7:0 DCS_DAC_WR _VAL_1_RD[7: 0] 0000_0000 Readback value for HPOUT1R. Two’s complement format. LSB is 0.25mV. Range is -32mV to +31.75mV Register 59h DC Servo Readback 1 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R90 (5Ah) DC Servo Readback 2 7:0 DCS_DAC_WR _VAL_0_RD[7: 0] 0000_0000 Readback value for HPOUT1L. Two’s complement format. LSB is 0.25mV. Range is -32mV to +31.75mV Register 5Ah DC Servo Readback 2 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R96 (60h) Analogue HP 0 7 HPOUT1L_RM V_SHORT 0 Removes HPOUT1L short 0 = HPOUT1L short enabled 1 = HPOUT1L short removed Note: Remove short after output stage has been enabled. 6 HPOUT1L_OU TP 0 Enables HPOUT1L output stage 0 = Disabled 1 = Enabled Note: Set after offset correction is complete 5 HPOUT1L_DL Y 0 Enables HPOUT1L intermediate stage 0 = Disabled 1 = Enabled Note: Set with at least 20us delay after HPOUT1L_ENA has been set. 3 HPOUT1R_RM V_SHORT 0 Removes HPOUT1R short 0 = HPOUT1R short enabled 1 = HPOUT1R short removed Note: Remove short after output stage has been enabled. 2 HPOUT1R_OU TP 0 Enables HPOUT1R output stage 0 = Disabled 1 = Enabled Note: Set after offset correction is complete 1 HPOUT1R_DL Y 0 Enables HPOUT1R intermediate stage 0 = Disabled 1 = Enabled Note: Set with at least 20us delay after HPOUT1R_ENA has been set. Register 60h Analogue HP 0 |
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