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ADV7129–SPECIFICATIONS

All Versions

Conditions

Min

Typ

Max

Units

STATIC PERFORMANCE

Resolution (Each DAC)

Bits

Accuracy (Each DAC)

Integral Nonlinearity

±1

LSB

Differential Nonlinearity

Guaranteed Monotonic

±1

LSB

Gray Scale Error

±5

% Gray Scale

Binary Coding

DIGITAL INPUTS

Input High Voltage, VINH

2.0

VAA + 0.5

Input Low Voltage, VINL

GND – 0.5

0.8

Input Current, IIN

VIN = 0.4 V or 2.4 V

±10

µA

Input Capacitance, CIN

DIGITAL OUTPUTS

Output High Voltage, VOH

IOH = –400

µA

2.4

Output Low Voltage, VOL

IOL = 3.2 mA

0.4

Floating-State Leakage Current

±10

µA

Floating-State Output Capacitance

ANALOG OUTPUTS

Gray Scale Current Range

Output Current

White Level Relative to Black

50.16

52.80

55.44

Black Level Relative to Blank

4.1

4.32

4.54

Blank Level, Sync Disabled

µA

LSB Size

223

µA

DAC to DAC Matching

Output Compliance, VOC

1.4

Output Impedance, ROUT

Ω

Output Capacitance, COUT

VOLTAGE REFERENCE

Voltage Reference Range, VREF

VREF = 1.234 V for Specified

1.14

1.235

1.30

Input Current, IVREF

Performance

µA

POWER REQUIREMENTS

VAA

IAA

Analog Current

160

200

IAA

Digital Current @ 360 MHz

360

400

Power Supply Rejection Ratio

0.12

%/%

DYNAMIC PERFORMANCE

Clock and Data Feedthrough

–30

Glitch Impulse

pV secs

DAC to DAC Crosstalk6

–23

NOTES

± 5% for all versions.

2Temperature range (T

MIN to TMAX), 0°C to +70°C, TJ (Silicon Junction Temperature) ≤100

oC.

3Static performance is measured with the Gain Error Registers set to 00H (disabled).

AA is measured with a typical dynamic pattern, satisfying the absolute maximum current spec for the DACs.

5Clock and Data Feedthrough is a function of the amount of overshoot and undershoot on the digital inputs. Glitch impulse includes clock and data

feedthrough. TTL input values are 0 V to 3 V, with input rise/fall times

≥3 ns, measured at the 10% and 90% points. Timing reference points are at 50% for

inputs and outputs.

6DAC to DAC crosstalk is measured by holding one DAC high while the other two DACs are making low to high and high to low transitions.

Specifications subject to change without notice.

(VAA

1 = +5 V, V

REF = +1.235 V, RRSET, RGSET, RBSET = 280

, RL = 25

, CL = 10 pF.

All specifications TMIN to TMAX

2 unless otherwise noted.)

REV. 0

–2–

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