LM3263

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SNVS837 – JUNE 2013

OPERATION DESCRIPTION

Device Information

The LM3263 is a high-efficiency step-down DC-DC converter optimized to power the RF power amplifier (PA) in

cell phones, portable communication devices, or battery-powered RF devices with a single Li-ion battery. It

operates in modulated-frequency Pulsed Width Modulation (PWM) mode for 2G transmissions (with

MODE=Forced PWM (PWM only), register 01h SMPS_CFG [5] set to 0b), automatic mode transition between

Pulse Frequency Modulation (PFM) and PWM for 3G/4G RF PA operation (with MODE=Auto-PFM (PFM/PWM),

SMPS_CFG bit 5 set to 1b), or Forced-Bypass mode (with SMPS_CFG [4] set to 1b or REGISTER_0 [6:0] set to

7Fh or register 03h VSET_CTRL [7:0] set to FEh-FFh). Power states are also in provided Shutdown, Low Power,

Standby, and Active modes. The DC-DC converter operates at Active mode. Please see LM3263 USER STATE

DIAGRAM and PROGRAMMABLE REGISTERS sections in detail.

PWM mode provides high efficiency and very low output-voltage ripple. In PWM mode operation, the modulated

switching frequency helps to reduce RF transmit noise. In PFM mode, the converter operates with reduced

switching frequencies and lower supply current to maintain high efficiencies. The forced bypass mode allows the

user to drive the output directly from the input supply through a bypass FET. The shutdown mode turns the

LM3263 off and reduces current consumption to 0.02 µA (typ).

In PWM and PFM mode of operation, the output voltage of the LM3263 can be dynamically programmed from

0.4V to 3.6V (typ) by setting the VSET register. Current overload protection and thermal overload protection are

also provided.

The LM3263 was engineered with Active Current assist and analog Bypass (ACB). This unique feature allows

the converter to support maximum load currents of 2.5A (min.) while keeping a small footprint inductor and

meeting all of the transient behaviors required for operation of a multi-mode RF Power Amplifier. The ACB circuit

provides an additional current path when the load current exceeds 1.45A (typ.) or as the switcher approaches

dropout. Similarly, the ACB circuit allows the converter to respond with faster VSET output voltage transition

times by providing extra output current on rising and falling output edges. The ACB circuit also performs the

function of analog bypass. Depending upon the input voltage, output voltage, and load current, the ACB circuit

automatically and seamlessly transitions the converter into analog bypass, while maintaining output voltage

regulation and low output voltage ripple. Full bypass (100% duty cycle operation) will occur if the total dropout

The LM3263’s 16-bump DSBGA package is the best solution for space-constrained applications such as cell

phones and other hand-held devices. The high switching frequency, 2.7MHz (typ.) in PWM mode, reduces the

size of input capacitors, output capacitor and of the inductor. Use of a DSBGA package is best suited for opaque

case applications and requires special design considerations for implementation. (Refer to DSBGA Package

Assembly And Use section below).

PWM Operation

The LM3263 operates in PWM mode when Forced-PWM mode operation is selected (SMPS_CFG [5] set to 0b).

The switching frequency is modulated, and the switcher regulates the output voltage by changing the energy per

cycle to support the load required. During the first portion of each switching cycle, the control block in the

LM3263 turns on the internal PFET switch. This allows current to flow from the input through the inductor and to

storing energy in its magnetic field.

During the second portion of each cycle, the control block turns the PFET switch off, blocking current flow from

the input, and then turns the NFET synchronous rectifier on. The inductor draws current from ground through the

NFET and to the output filter capacitor and load, which ramps the inductor current down with a slope of -VSET/L.

The output filter capacitor stores charge when the inductor current is greater than the load current and releases it

when the inductor current is less than the load current, smoothing the voltage across the load.

At the next rising edge of the clock, the cycle repeats. An increase of load pulls the output voltage down,

increasing the error signal. As the error signal increases, the peak inductor current becomes higher therefore

increasing the average inductor current. The output voltage is therefore regulated by modulating the PFET switch

on time to control the average current sent to the load. The circuit generates a duty-cycle modulated rectangular

signal that is averaged using a low pass filter formed by the inductor and output capacitor. The output voltage is

equal to the average of the duty-cycle modulated rectangular signal.

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