L99MC6 datasheet(34/55 Pages) STMICROELECTRONICS

34 / 55 page

SPI control and status register

L99MC6

34/55

Doc ID 16523 Rev 1

SPI control and status register

9.1

RAM memory map

9.2

ROM memory map (access with OC0 and OC1 set to ‘1’)

9.3

Control and status registers

Table 22.

RAM memory map

Address

Name

Access

Content

00h

CTRL 0

Read/Write

Global enable, channels 3 and 6 control register

01h

CTRL 1

Read/Write

CP, channels 2 and 5 control register

02h

CTRL 2

Read/Write

CP, channels 1 and 4 control register

03h

Unused

04h

STAT 0

Read only

Open-load / thermal status register

05h

STAT 1

Read only

Overcurrent / thermal status register

Table 23.

ROM memory map

Address

Name

Access

Content

00h

ID Header

Read only

42h (device class ASSP, 2 additional information bytes)

01h

Product ID

Read only

06H

02h

Category /

Version

Read only

18h (multi channel driver,

last 3 LSB = 0: engineering samples)

3Eh

SPI-Frame ID

Read only

01h (no burst mode, no watchdog, 16 bit frame SPI)

Table 24.

Control register 0

Adress

Access

Data Byte

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Global enable, Channel 3&6 control

00h

R/W

CH6

[2]

CH6

[1]

CH6

[0]

Bridge

3&6

CH3

[2]

CH3

[1]

CH3

[0]

Default

000

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