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STM32F207 Datasheet(PDF) 113 Page - STMicroelectronics |
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STM32F207 Datasheet(HTML) 113 Page - STMicroelectronics |
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113 / 163 page  STM32F205xx, STM32F207xx Electrical characteristics Doc ID 15818 Rev 7 113/163 General PCB design guidelines Power supply decoupling should be performed as shown in Figure 51 or Figure 52, depending on whether VREF+ is connected to VDDA or not. The 10 nF capacitors should be ceramic (good quality). They should be placed them as close as possible to the chip. Figure 51. Power supply and reference decoupling (VREF+ not connected to VDDA) 1. VREF+ and VREF– inputs are available only on 100-pin packages. Figure 52. Power supply and reference decoupling (VREF+ connected to VDDA) 1. VREF+ and VREF– inputs are available only on 100-pin packages. V REF+ STM32F V DDA V SSA/V REF- 1 µF // 10 nF 1 µF // 10 nF ai17535 (See note 1) (See note 1) VREF+/VDDA STM32F 1 µF // 10 nF VREF–/VSSA ai17536 (See note 1) (See note 1) |
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