ADS5522IPAP datasheet(24/32 Pages) TI

24 / 32 page

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POWER-SUPPLY SEQUENCE

REFP

REFM

IREF

56.2kW

1 W

CLOCK INPUT

AVDD

REFP

2kW

1 W

POWER-DOWN

REFERENCE CIRCUIT

5 kW

3 pF

6 pF

CLKP

CLKM

ADS5522

SBAS320C – MAY 2004 – REVISED FEBRUARY 2007

connected from IREF (pin 31) to AGND to set the

proper current for the operation of the ADC, as

The preferred power-up sequence is to ramp AVDD

shown in Figure 42. No capacitor should

first, followed by DRVDD, including a simultaneous

connected between pin 31 and ground; only the

ramp of AVDD and DRVDD. In the event that DRVDD

56.2-k

Ω resistor should be used.

ramps up first in the system, care must be taken to

ensure that AVDD ramps up within 10 ms. Optionally,

it is recommended to put a 2-k

Ω resistor from REFP

(pin 29) to AVDD as shown in Figure 41. This helps

to make the device more robust to power supply

ramp-up timings.

Figure 42. REFP, REFM, and IREF Connections

for Optimum Performance

The ADS5522 clock input can be driven with either a

Figure 41. Power-Up Sequence

differential clock signal or a single-ended clock input,

with little or no difference in performance between

both configurations. The common-mode voltage of

the clock inputs is set internally to CM (pin 17) using

The device enters power-down in one of two ways:

internal 5-k

Ω resistors that connect CLKP (pin 10)

either by reducing the clock speed or by setting the

and CLKM (pin 11) to CM (pin 17), as shown in

PDN bit throught the serial programming interface.

Figure 43.

Using the reduced clock speed, power-down may be

initiated for clock frequency below 2 MSPS. The

exact frequency at which the power down occurs

varies from device to device.

Using the serial interface PDN bit to power down the

device places the outputs in a high-impedance state

and only the internal reference remains on to reduce

the power-up time. The power-down mode reduces

power dissipation to approximately 180 mW.

The

ADS5522

has

built-in

internal

reference

generation, requiring no external circuitry on the

printed

circuit

board

(PCB).

For

optimum

performance, it is best to connect both REFP and

REFM to ground with a 1-

µF decoupling capacitor

(the 1-

Ω resistor shown in Figure 42 is optional). In

addition, an external 56.2-k

Ω resistor should be

Figure 43. Clock Inputs

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